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authorChris Ching <chingcodes@chromium.org>2017-12-20 16:06:03 -0700
committerChris Ching <chingcodes@chromium.org>2018-01-03 22:33:49 +0000
commit6fc39d47d017409a30239a031b16413e30700452 (patch)
treef3b2a71f182ffd7982faa1fce31f93ec6f958232 /src/soc/amd/stoneyridge/lpc.c
parentfc511277a57857fe5fd41bf0d877d1dd17f3b92f (diff)
downloadcoreboot-6fc39d47d017409a30239a031b16413e30700452.tar.xz
soc/amd/stoneyridge: Add I2C support
BUG=b:69416132 BRANCH=none TEST=make Change-Id: Id940af917c9525aba7bc25eea0821f5f36a36653 Signed-off-by: Chris Ching <chingcodes@chromium.org> Reviewed-on: https://review.coreboot.org/22959 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/lpc.c')
-rw-r--r--src/soc/amd/stoneyridge/lpc.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/lpc.c b/src/soc/amd/stoneyridge/lpc.c
index 1e03feabb6..10f4a4b7df 100644
--- a/src/soc/amd/stoneyridge/lpc.c
+++ b/src/soc/amd/stoneyridge/lpc.c
@@ -137,6 +137,12 @@ static void lpc_read_resources(device_t dev)
res->size = 0x00001000;
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
+ /* I2C devices (all 4 devices) */
+ res = new_resource(dev, 4);
+ res->base = I2C_BASE_ADDRESS;
+ res->size = I2C_DEVICE_SIZE * I2C_DEVICE_COUNT;
+ res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
+
compact_resources(dev);
/* Allocate ACPI NVS in CBMEM */