diff options
author | Marc Jones <marcj303@gmail.com> | 2017-08-07 19:08:24 -0600 |
---|---|---|
committer | Marc Jones <marc@marcjonesconsulting.com> | 2017-08-14 14:50:51 +0000 |
commit | dfeb1c4da9be7ac97bd31f580ff2fff0c4b3256e (patch) | |
tree | 40af1e9b65705e3886408d07e1faaba85949bd1f /src/soc/amd/stoneyridge/lpc.c | |
parent | 4b7b18d14ac99d2337796facd3028647799b4f66 (diff) | |
download | coreboot-dfeb1c4da9be7ac97bd31f580ff2fff0c4b3256e.tar.xz |
stoneyridge: Rename hudson to southbridge
Simplify funciton names and remove reference to hudson in stoneyridge.
The southbridge in Stoney Ridge is Kern and hudson naming is
no longer accurate.
BUG=b:62200157
BRANCH=none
TEST=Build and booted on Kahlee.
Change-Id: Ide7a72dae69b881997101f1e37a1ac739901744d
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/20912
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/lpc.c')
-rw-r--r-- | src/soc/amd/stoneyridge/lpc.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/soc/amd/stoneyridge/lpc.c b/src/soc/amd/stoneyridge/lpc.c index fae5c554ba..75cedfe47f 100644 --- a/src/soc/amd/stoneyridge/lpc.c +++ b/src/soc/amd/stoneyridge/lpc.c @@ -31,7 +31,7 @@ #include <pc80/i8259.h> #include <soc/acpi.h> #include <soc/pci_devs.h> -#include <soc/hudson.h> +#include <soc/southbridge.h> #include <soc/nvs.h> #include <vboot/vbnv.h> @@ -105,7 +105,7 @@ static void lpc_init(device_t dev) pm_write8(PM_SERIRQ_CONF, byte); } -static void hudson_lpc_read_resources(device_t dev) +static void lpc_read_resources(device_t dev) { struct resource *res; global_nvs_t *gnvs; @@ -141,7 +141,7 @@ static void hudson_lpc_read_resources(device_t dev) gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(global_nvs_t)); } -static void hudson_lpc_set_resources(struct device *dev) +static void lpc_set_resources(struct device *dev) { struct resource *res; u32 spi_enable_bits; @@ -162,7 +162,7 @@ static void hudson_lpc_set_resources(struct device *dev) * @param dev the device whose children's resources are to be enabled * */ -static void hudson_lpc_enable_childrens_resources(device_t dev) +static void lpc_enable_childrens_resources(device_t dev) { struct bus *link; u32 reg, reg_x; @@ -218,7 +218,7 @@ static void hudson_lpc_enable_childrens_resources(device_t dev) base = res->base; end = resource_end(res); /* find a resource size */ - printk(BIOS_DEBUG, "hudson lpc decode:%s, base=0x%08x, end=0x%08x\n", + printk(BIOS_DEBUG, "Southbridge LPC decode:%s, base=0x%08x, end=0x%08x\n", dev_path(child), base, end); switch (base) { case 0x60: /* KB */ @@ -342,10 +342,10 @@ static void hudson_lpc_enable_childrens_resources(device_t dev) pci_write_config8(dev, 0x74, wiosize); } -static void hudson_lpc_enable_resources(device_t dev) +static void lpc_enable_resources(device_t dev) { pci_dev_enable_resources(dev); - hudson_lpc_enable_childrens_resources(dev); + lpc_enable_childrens_resources(dev); } unsigned long acpi_fill_mcfg(unsigned long current) @@ -359,9 +359,9 @@ static struct pci_operations lops_pci = { }; static struct device_operations lpc_ops = { - .read_resources = hudson_lpc_read_resources, - .set_resources = hudson_lpc_set_resources, - .enable_resources = hudson_lpc_enable_resources, + .read_resources = lpc_read_resources, + .set_resources = lpc_set_resources, + .enable_resources = lpc_enable_resources, .acpi_inject_dsdt_generator = southbridge_inject_dsdt, .write_acpi_tables = southbridge_write_acpi_tables, .init = lpc_init, |