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author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2019-12-02 17:02:00 +0100 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-12-04 12:28:16 +0000 |
commit | 5a6620277d6232a0d222047cbd7db414fb8585bc (patch) | |
tree | 69e63c9ccd4a4af1f058091a5a3dae02ae485e1a /src/soc/amd/stoneyridge/nb_util.c | |
parent | f65c1e40885377a07794fc59f38fce1c9230854f (diff) | |
download | coreboot-5a6620277d6232a0d222047cbd7db414fb8585bc.tar.xz |
amdblocks/acpimmio: add common functions for AP entry
Move the stoneyridge implementation of get/set AP entry to the common
block.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I9c73940ffe5f735dcd844911361355c384f617b1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37416
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/nb_util.c')
-rw-r--r-- | src/soc/amd/stoneyridge/nb_util.c | 40 |
1 files changed, 0 insertions, 40 deletions
diff --git a/src/soc/amd/stoneyridge/nb_util.c b/src/soc/amd/stoneyridge/nb_util.c deleted file mode 100644 index d5de067814..0000000000 --- a/src/soc/amd/stoneyridge/nb_util.c +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2018 Advanced Micro Devices - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <soc/northbridge.h> -#include <soc/pci_devs.h> -#include <device/pci_ops.h> - -uint32_t nb_ioapic_read(unsigned int index) -{ - pci_write_config32(SOC_GNB_DEV, NB_IOAPIC_INDEX, index); - return pci_read_config32(SOC_GNB_DEV, NB_IOAPIC_DATA); -} - -void nb_ioapic_write(unsigned int index, uint32_t value) -{ - pci_write_config32(SOC_GNB_DEV, NB_IOAPIC_INDEX, index); - pci_write_config32(SOC_GNB_DEV, NB_IOAPIC_DATA, value); -} - -void *get_ap_entry_ptr(void) -{ - return (void *)nb_ioapic_read(AP_SCRATCH_REG); -} - -void set_ap_entry_ptr(void *entry) -{ - nb_ioapic_write(AP_SCRATCH_REG, (uintptr_t)entry); -} |