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author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-11-01 11:44:48 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-02-12 17:02:37 +0000 |
commit | 8f2a7e073bab420969f9390b44d64459ad7268ce (patch) | |
tree | 57f2bd1736cb534d07c5bc88d2ffb999407ac206 /src/soc/amd/stoneyridge/northbridge.c | |
parent | bb6c3f59d11d9600c1664286299f9abc60cf1b55 (diff) | |
download | coreboot-8f2a7e073bab420969f9390b44d64459ad7268ce.tar.xz |
amd/stoneyridge: Add S3 support to POST
Add/update the romstage and ramstage paths to check for S3 resume
and call the appropriate AGESA functions.
TEST=Suspend/Resume Kahlee with full S3 patch stack
BUG=b:69614064
Change-Id: Ie6ae66f88b888fff3a800b4ed55dd1f6fed712b2
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22731
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/northbridge.c')
-rw-r--r-- | src/soc/amd/stoneyridge/northbridge.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index 9d2823f329..2449077313 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -28,6 +28,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <romstage_handoff.h> #include <amdblocks/agesawrapper.h> #include <amdblocks/agesawrapper_call.h> #include <agesa_headers.h> @@ -425,14 +426,9 @@ void domain_read_resources(device_t dev) void domain_enable_resources(device_t dev) { - if (acpi_is_wakeup_s3()) - do_agesawrapper(agesawrapper_fchs3laterestore, - "fchs3laterestore"); - /* Must be called after PCI enumeration and resource allocation */ - else + if (!romstage_handoff_is_resume()) do_agesawrapper(agesawrapper_amdinitmid, "amdinitmid"); - printk(BIOS_DEBUG, " ader - leaving domain_enable_resources.\n"); } void domain_set_resources(device_t dev) |