diff options
| author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-10-26 13:25:01 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-03 13:21:35 +0000 |
| commit | e24d7953bb4a862b32f554195fffb3c119a27161 (patch) | |
| tree | 621d5fc455ce9bd4388488ba68d38beac3d8b839 /src/soc/amd/stoneyridge/pmutil.c | |
| parent | 2c5ea145a4547c5c27de4bcc065a6345ea285fe6 (diff) | |
| download | coreboot-e24d7953bb4a862b32f554195fffb3c119a27161.tar.xz | |
soc/amd/stoneyridge: Use new ACPI MMIO functions
Replace IO access to ACPI registers with the new MMIO access functions.
BUG=b:118049037
TEST=Build and boot grunt. Test ACPI related functionality.
Change-Id: I7544169bb21982fcf7b1c07ab7c19c6f5e65ad56
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/c/29296
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/pmutil.c')
| -rw-r--r-- | src/soc/amd/stoneyridge/pmutil.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/soc/amd/stoneyridge/pmutil.c b/src/soc/amd/stoneyridge/pmutil.c index 7e5e4dfe4b..d2b3ac7bed 100644 --- a/src/soc/amd/stoneyridge/pmutil.c +++ b/src/soc/amd/stoneyridge/pmutil.c @@ -27,10 +27,11 @@ int vbnv_cmos_failed(void) int vboot_platform_is_resuming(void) { - if (!(inw(pm_acpi_pm_evt_blk()) & WAK_STS)) + if (!(acpi_read16(MMIO_ACPI_PM1_STS) & WAK_STS)) return 0; - return acpi_sleep_from_pm1(inw(pm_acpi_pm_cnt_blk())) == ACPI_S3; + uint16_t pm_cnt = acpi_read16(MMIO_ACPI_PM1_CNT_BLK); + return acpi_sleep_from_pm1(pm_cnt) == ACPI_S3; } /* If vboot requests a system reset, modify the PM1 register so it will never be @@ -39,8 +40,8 @@ void vboot_platform_prepare_reboot(void) { uint16_t pm1; - pm1 = inw(pm_acpi_pm_cnt_blk()); + pm1 = acpi_read16(MMIO_ACPI_PM1_CNT_BLK); pm1 &= ~SLP_TYP; pm1 |= SLP_TYP_S5 << SLP_TYP_SHIFT; - outw(pm1, pm_acpi_pm_cnt_blk()); + acpi_write16(MMIO_ACPI_PM1_CNT_BLK, pm1); } |