soc/amd/stoneyridge: Access SMBUS through MMIO

Currently SMBUS registers are accessed through IO, but with stoneyridge
they can be accessed through MMIO. This reduces the time of execution by
a tiny amount (MMIO write is faster than IO write, though MMIO read is about
as fast as IO read) as most of the time consumed is actually transaction
time. Convert code to MMIO access.

BUG=b:117754784
TEST=Used IO to write and MMIO to read, to confirm a one to one relationship
between IO and MMIO. Then build and boot grunt.

Change-Id: Ibe1471d1d578611e7d666f70bc97de4c3b74d7f8
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/c/29258
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

1 files changed, 10 insertions, 0 deletions

diff --git a/src/soc/amd/stoneyridge/sb_util.c b/src/soc/amd/stoneyridge/sb_util.c
index ccbde7e5d9..eeb550cb7f 100644
--- a/src/soc/amd/stoneyridge/sb_util.c
+++ b/src/soc/amd/stoneyridge/sb_util.c
@@ -200,6 +200,16 @@ uint32_t xhci_pm_read32(uint8_t reg)
 	return read32((void *)(XHCI_ACPI_PM_MMIO_BASE + reg));
 }
 
+void smbus_write8(uint32_t mmio, uint8_t reg, uint8_t value)
+{
+	write8((void *)(mmio + reg), value);
+}
+
+uint8_t smbus_read8(uint32_t mmio, uint8_t reg)
+{
+	return read8((void *)(mmio + reg));
+}
+
 int acpi_get_sleep_type(void)
 {
 	return acpi_sleep_from_pm1(inw(pm_acpi_pm_cnt_blk()));