soc/amd/stoneyridge: Simplify and fix SMBUS code

Solve issues left from Change-Id Ib88a868e654ad127be70ecc506f6b90b784f8d1b
Unify code: smbus.c to have the actual execution code, sm.c and smbus_spd.c
call functions within smbus.c.

Fix some functions that wrongly use SMBHSTCTRL as the register for the
data being transfered. The correct register is SMBHSTDAT0.

Include file smbus.h should only be used by sm.c, smbus.c and smbus_spd.c.

BUG=b:62200225

Change-Id: Ibd55560c95b6752652a4f255b04198e7a4e77d05
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/21887
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>

1 files changed, 24 insertions, 27 deletions

diff --git a/src/soc/amd/stoneyridge/smbus.c b/src/soc/amd/stoneyridge/smbus.c
index b216f1ee9a..919a52edd4 100644
--- a/src/soc/amd/stoneyridge/smbus.c
+++ b/src/soc/amd/stoneyridge/smbus.c
@@ -17,14 +17,14 @@
 #include <stdint.h>
 #include <soc/smbus.h>
 
-static int smbus_wait_until_ready(u32 smbus_io_base)
+static int smbus_wait_until_ready(u16 smbus_io_base)
 {
 	u32 loops;
 	loops = SMBUS_TIMEOUT;
 	do {
 		u8 val;
 		val = inb(smbus_io_base + SMBHSTSTAT);
-		val &= 0x1f;
+		val &= SMBHST_STAT_VAL_BITS;
 		if (val == 0) {	/* ready now */
 			return 0;
 		}
@@ -33,7 +33,7 @@ static int smbus_wait_until_ready(u32 smbus_io_base)
 	return -2;		/* time out */
 }
 
-static int smbus_wait_until_done(u32 smbus_io_base)
+static int smbus_wait_until_done(u16 smbus_io_base)
 {
 	u32 loops;
 	loops = SMBUS_TIMEOUT;
@@ -41,10 +41,10 @@ static int smbus_wait_until_done(u32 smbus_io_base)
 		u8 val;
 
 		val = inb(smbus_io_base + SMBHSTSTAT);
-		val &= 0x1f;	/* mask off reserved bits */
-		if (val & 0x1c)
+		val &= SMBHST_STAT_VAL_BITS;	/* mask off reserved bits */
+		if (val & SMBHST_STAT_ERROR_BITS)
 			return -5;	/* error */
-		if (val == 0x02) {
+		if (val == SMBHST_STAT_NOERROR) {
 			outb(val, smbus_io_base + SMBHSTSTAT); /* clear sts */
 			return 0;
 		}
@@ -52,7 +52,7 @@ static int smbus_wait_until_done(u32 smbus_io_base)
 	return -3;		/* timeout */
 }
 
-int do_smbus_recv_byte(u32 smbus_io_base, u32 device)
+int do_smbus_recv_byte(u16 smbus_io_base, u8 device)
 {
 	u8 byte;
 
@@ -63,8 +63,8 @@ int do_smbus_recv_byte(u32 smbus_io_base, u32 device)
 	outb(((device & 0x7f) << 1) | 1, smbus_io_base + SMBHSTADDR);
 
 	byte = inb(smbus_io_base + SMBHSTCTRL);
-	byte &= 0xe3;		/* Clear [4:2] */
-	byte |= (1 << 2) | (1 << 6); /* Byte data R/W cmd, start the command */
+	byte &= ~SMBHST_CTRL_MODE_BITS;			/* Clear [4:2] */
+	byte |= SMBHST_CTRL_STRT | SMBHST_CTRL_BTE_RW;	/* set mode, start */
 	outb(byte, smbus_io_base + SMBHSTCTRL);
 
 	/* poll for transaction completion */
@@ -72,12 +72,12 @@ int do_smbus_recv_byte(u32 smbus_io_base, u32 device)
 		return -3;	/* timeout or error */
 
 	/* read results of transaction */
-	byte = inb(smbus_io_base + SMBHSTCMD);
+	byte = inb(smbus_io_base + SMBHSTDAT0);
 
 	return byte;
 }
 
-int do_smbus_send_byte(u32 smbus_io_base, u32 device, u8 val)
+int do_smbus_send_byte(u16 smbus_io_base, u8 device, u8 val)
 {
 	u8 byte;
 
@@ -85,14 +85,14 @@ int do_smbus_send_byte(u32 smbus_io_base, u32 device, u8 val)
 		return -2;	/* not ready */
 
 	/* set the command... */
-	outb(val, smbus_io_base + SMBHSTCMD);
+	outb(val, smbus_io_base + SMBHSTDAT0);
 
 	/* set the device I'm talking to */
 	outb(((device & 0x7f) << 1) | 0, smbus_io_base + SMBHSTADDR);
 
 	byte = inb(smbus_io_base + SMBHSTCTRL);
-	byte &= 0xe3;		/* Clear [4:2] */
-	byte |= (1 << 2) | (1 << 6);	/* Byte data R/W cmd, start command */
+	byte &= ~SMBHST_CTRL_MODE_BITS;			/* Clear [4:2] */
+	byte |= SMBHST_CTRL_STRT | SMBHST_CTRL_BTE_RW;	/* set mode, start */
 	outb(byte, smbus_io_base + SMBHSTCTRL);
 
 	/* poll for transaction completion */
@@ -102,8 +102,7 @@ int do_smbus_send_byte(u32 smbus_io_base, u32 device, u8 val)
 	return 0;
 }
 
-int do_smbus_read_byte(u32 smbus_io_base, u32 device,
-			      u32 address)
+int do_smbus_read_byte(u16 smbus_io_base, u8 device, u8 address)
 {
 	u8 byte;
 
@@ -117,8 +116,8 @@ int do_smbus_read_byte(u32 smbus_io_base, u32 device,
 	outb(((device & 0x7f) << 1) | 1, smbus_io_base + SMBHSTADDR);
 
 	byte = inb(smbus_io_base + SMBHSTCTRL);
-	byte &= 0xe3;		/* Clear [4:2] */
-	byte |= (1 << 3) | (1 << 6);	/* Byte data R/W cmd, start command */
+	byte &= ~SMBHST_CTRL_MODE_BITS;			/* Clear [4:2] */
+	byte |= SMBHST_CTRL_STRT | SMBHST_CTRL_BDT_RW;	/* set mode, start */
 	outb(byte, smbus_io_base + SMBHSTCTRL);
 
 	/* poll for transaction completion */
@@ -131,8 +130,7 @@ int do_smbus_read_byte(u32 smbus_io_base, u32 device,
 	return byte;
 }
 
-int do_smbus_write_byte(u32 smbus_io_base, u32 device,
-			       u32 address, u8 val)
+int do_smbus_write_byte(u16 smbus_io_base, u8 device, u8 address, u8 val)
 {
 	u8 byte;
 
@@ -149,8 +147,8 @@ int do_smbus_write_byte(u32 smbus_io_base, u32 device,
 	outb(val, smbus_io_base + SMBHSTDAT0);
 
 	byte = inb(smbus_io_base + SMBHSTCTRL);
-	byte &= 0xe3;		/* Clear [4:2] */
-	byte |= (1 << 3) | (1 << 6);	/* Byte data R/W cmd, start command */
+	byte &= ~SMBHST_CTRL_MODE_BITS;			/* Clear [4:2] */
+	byte |= SMBHST_CTRL_STRT | SMBHST_CTRL_BDT_RW;	/* set mode, start */
 	outb(byte, smbus_io_base + SMBHSTCTRL);
 
 	/* poll for transaction completion */
@@ -160,8 +158,7 @@ int do_smbus_write_byte(u32 smbus_io_base, u32 device,
 	return 0;
 }
 
-void alink_ab_indx(u32 reg_space, u32 reg_addr,
-			  u32 mask, u32 val)
+void alink_ab_indx(u32 reg_space, u32 reg_addr, u32 mask, u32 val)
 {
 	u32 tmp;
 
@@ -185,8 +182,7 @@ void alink_ab_indx(u32 reg_space, u32 reg_addr,
 	outl(0, AB_INDX);
 }
 
-void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port,
-			  u32 mask, u32 val)
+void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port, u32 mask, u32 val)
 {
 	u32 tmp;
 
@@ -210,7 +206,8 @@ void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port,
 	outl(0, AB_INDX);
 }
 
-/* space = 0: AX_INDXC, AX_DATAC
+/*
+ * space = 0: AX_INDXC, AX_DATAC
  * space = 1: AX_INDXP, AX_DATAP
  */
 void alink_ax_indx(u32 space /*c or p? */, u32 axindc, u32 mask, u32 val)