diff options
| author | Gaggery Tsai <gaggery.tsai@intel.com> | 2018-01-15 22:48:18 +0800 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2018-01-22 16:19:42 +0000 |
| commit | 2ce90903b0302d3b225973ea65402653a5cf3fb0 (patch) | |
| tree | e170df34dbc55e828ef9e26e56d4b44ef62c7829 /src/soc/amd/stoneyridge/southbridge.c | |
| parent | 30a6b74f99f5c10f673641ee914046f641f67408 (diff) | |
| download | coreboot-2ce90903b0302d3b225973ea65402653a5cf3fb0.tar.xz | |
mb/google/fizz: Remove IccMax settings from DT
This patch removes IccMax settings from device tree since they
are handled in SoC code from patch e1a75d.
BUG=b:71369428
BRANCH=None
TEST="USE=fw_debug emerge-fizz chromeos-mrc coreboot
chromeos-bootimage" & ensure the IccMax settings passed
to FSP are from SoC code.
Change-Id: I6b01c50a2589d1722c5bf4aa2f44a9574df818f4
Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com>
Reviewed-on: https://review.coreboot.org/23278
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/southbridge.c')
0 files changed, 0 insertions, 0 deletions