diff options
author | Justin TerAvest <teravest@chromium.org> | 2018-02-28 11:42:38 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-03-01 16:05:18 +0000 |
commit | bb75effd87f9f86fa612dcfa1aa7b6156d110f01 (patch) | |
tree | caeed1f06e9a44075b41d2eb1abb76f43add3e87 /src/soc/amd/stoneyridge/southbridge.c | |
parent | a8c9efe655509a5f7773ab17e191bf1b1b58d3ef (diff) | |
download | coreboot-bb75effd87f9f86fa612dcfa1aa7b6156d110f01.tar.xz |
soc/amd/stoneyridge: Remove printk for GPIO
The printk() calls in sb_program_gpios() aren't necessary, and incur a
13 second delay if the function is called from
bootblock_mainboard_early_init(). This commit removes them so GPIOs can
be set up earlier.
TEST=call sb_program_gpios from bootblock_mainboard_early_init
BUG=b:73898539
Change-Id: I064291decf47d86132e36469e029b3262ec20172
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Reviewed-on: https://review.coreboot.org/24915
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/southbridge.c')
-rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 5d7b73d1a6..3d0cc74779 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -161,7 +161,6 @@ void sb_program_gpios(const struct soc_amd_stoneyridge_gpio *gpio_ptr, void *tmp_ptr; uint8_t control, mux, index; - printk(BIOS_SPEW, "GPIO programming stage %s\n", STR_GPIO_STAGE); for (index = 0; index < size; index++) { mux = gpio_ptr[index].function; control = gpio_ptr[index].control; @@ -176,7 +175,6 @@ void sb_program_gpios(const struct soc_amd_stoneyridge_gpio *gpio_ptr, AMD_GPIO_CONTROL + 2); write8(tmp_ptr, control); } - printk(BIOS_SPEW, "End GPIO programming\n"); } /** |