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author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2018-10-05 14:41:15 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2018-10-12 15:08:21 +0000 |
commit | 10509c6f190c791d4e06006610dd83200c9fad37 (patch) | |
tree | d2fa454e07aa2f5689a7c168052647400df24da6 /src/soc/amd/stoneyridge/spi.c | |
parent | ba748cc7c0136e031249ddd831cc49f14885dc97 (diff) | |
download | coreboot-10509c6f190c791d4e06006610dd83200c9fad37.tar.xz |
amd/stoneyridge: Remove hudson register definitions
Delete artifacts remaining from the original "hudson" and "yangtze"
controller hub designs.
Husdon devices had a configurable AcpiMmio base address, and a selection
for I/O vs. MMIO decode. Modern products are fixed at 0xfed80000 in MMIO.
Remove the flash control register definitions for the old generations.
The manual reset register appears to not function as hudson.
PMIO_DEBUG is named differently now, and not used, so remove its
definition too.
Change-Id: I6484bb2ca80b65318565dfee1a3368b121aea9de
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/29008
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/spi.c')
0 files changed, 0 insertions, 0 deletions