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author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-10-12 11:23:33 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2017-10-16 00:12:35 +0000 |
commit | 78130663e5cac7939ee04f97ac1c7fcecde23820 (patch) | |
tree | a7281c09543deaf0536833201df03ecbd632ee97 /src/soc/amd/stoneyridge/uart.c | |
parent | 30f9b953a8ddf3d283e63f9bc1f95605d10a6491 (diff) | |
download | coreboot-78130663e5cac7939ee04f97ac1c7fcecde23820.tar.xz |
drivers/uart8250mem: Check for zero base address
Before adding a new UART to the coreboot/lb table, verify that it
has a non-zero base address. This is consistent with all other
functions that use the uart_platform_base() function.
This was tested on google/kahlee by using an invalid UART number
and forcing the base address to 0. Execution was able to complete
through depthcharge and into the OS.
Change-Id: I6d8183a461f0fedc254bf88de5ec96629a2a80ef
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/21996
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/uart.c')
0 files changed, 0 insertions, 0 deletions