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| author | Matt DeVillier <matt.devillier@gmail.com> | 2017-06-04 14:39:18 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-03-07 21:19:10 +0000 |
| commit | 687eb30dd869c43aeb1e2fc1964f520feb0f6d8e (patch) | |
| tree | 140eb66367696e49cd36b08c15c5270e08a55989 /src/soc/amd/stoneyridge | |
| parent | df2ae96ad8a83fb47d6cdff50353ad28b36ae87a (diff) | |
| download | coreboot-687eb30dd869c43aeb1e2fc1964f520feb0f6d8e.tar.xz | |
soc/intel/braswell: add LPEA resources to southcluster.asl
The LPEA device memory resources, required by Windows drivers,
were not being set. Allocate required resources per Inte'sl CHT
Tianocore reference code.
Test: boot Windows on google/edgar, observe LPEA device working properly.
Change-Id: Ic3ecfc2ddade7d76dbaa95ffdd82599c3bcf35da
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/24987
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge')
0 files changed, 0 insertions, 0 deletions