diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-03-10 15:47:00 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-03-11 15:11:20 +0000 |
| commit | a5cdf75f690c2fb48d00df6ab4e7ba2bfd8a4480 (patch) | |
| tree | 93de8f242ab575df4d02b8be7a24713e0099a9ed /src/soc/amd/stoneyridge | |
| parent | 4626a6684ca02675cebd4e5ceea8ca959cd13472 (diff) | |
| download | coreboot-a5cdf75f690c2fb48d00df6ab4e7ba2bfd8a4480.tar.xz | |
soc/amd: move warm reset flag function prototypes to common code
Even though the implementation is different on Stoneyridge compared to
Picasso and Cezanne, the function prototypes are identical, so move them
to the AMD SoC common reset header file.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8d3a3a9ea568ea18658c49612efabdbe36d5f957
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51395
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge')
| -rw-r--r-- | src/soc/amd/stoneyridge/cpu.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/northbridge.h | 2 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/mca.c | 2 |
3 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c index d943deb69a..e00763753a 100644 --- a/src/soc/amd/stoneyridge/cpu.c +++ b/src/soc/amd/stoneyridge/cpu.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <amdblocks/reset.h> #include <amdblocks/smm.h> #include <cpu/amd/msr.h> #include <cpu/cpu.h> diff --git a/src/soc/amd/stoneyridge/include/soc/northbridge.h b/src/soc/amd/stoneyridge/include/soc/northbridge.h index d00f5660d7..8eb3a25825 100644 --- a/src/soc/amd/stoneyridge/include/soc/northbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/northbridge.h @@ -86,7 +86,5 @@ void domain_enable_resources(struct device *dev); void domain_read_resources(struct device *dev); void fam15_finalize(void *chip_info); -void set_warm_reset_flag(void); -int is_warm_reset(void); #endif /* AMD_STONEYRIDGE_NORTHBRIDGE_H */ diff --git a/src/soc/amd/stoneyridge/mca.c b/src/soc/amd/stoneyridge/mca.c index 0f2900cb94..b1f955fcc3 100644 --- a/src/soc/amd/stoneyridge/mca.c +++ b/src/soc/amd/stoneyridge/mca.c @@ -1,9 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <amdblocks/reset.h> #include <cpu/x86/msr.h> #include <acpi/acpi.h> #include <soc/cpu.h> -#include <soc/northbridge.h> #include <console/console.h> #include <arch/bert_storage.h> #include <cper.h> |