soc/amd/stoneyridge: remove dependence on TSC

The TSC rate is empirically swinging during early boot. That
leaves timestamps and udelay()s to not be correct. To rectify this
stop using TSC for all of these time sources. Instead use the
performance TSC which is at a fixed 100MHz clock. That provides
stable time sources and legit timestamps.

BUG=b:72378235,b:72170796

Change-Id: Ia2693c415c557aac687bcb48ee69358ea1c53d67
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/23424
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

3 files changed, 12 insertions, 4 deletions

diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index fbeabb71cd..148ca3ff04 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -32,14 +32,14 @@ config CPU_SPECIFIC_OPTIONS
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select ACPI_AMD_HARDWARE_SLEEP_VALUES
+	select COLLECT_TIMESTAMPS_NO_TSC
 	select DRIVERS_I2C_DESIGNWARE
 	select GENERIC_GPIO_LIB
+	select GENERIC_UDELAY
 	select IOAPIC
 	select HAVE_USBDEBUG_OPTIONS
 	select HAVE_HARD_RESET
-	select UDELAY_TSC
 	select HAVE_MONOTONIC_TIMER
-	select TSC_CONSTANT_RATE
 	select SPI_FLASH if HAVE_ACPI_RESUME
 	select TSC_SYNC_LFENCE
 	select COLLECT_TIMESTAMPS
diff --git a/src/soc/amd/stoneyridge/bootblock/bootblock.c b/src/soc/amd/stoneyridge/bootblock/bootblock.c
index 4b58287ba5..f9ae365c0d 100644
--- a/src/soc/amd/stoneyridge/bootblock/bootblock.c
+++ b/src/soc/amd/stoneyridge/bootblock/bootblock.c
@@ -28,6 +28,7 @@
 #include <soc/northbridge.h>
 #include <soc/southbridge.h>
 #include <amdblocks/psp.h>
+#include <timestamp.h>
 
 asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
 {
@@ -40,7 +41,8 @@ asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
 	if (!boot_cpu())
 		bootblock_soc_early_init(); /* APs will not return */
 
-	bootblock_main_with_timestamp(base_timestamp);
+	/* TSC cannot be relied upon. Override the TSC value passed in. */
+	bootblock_main_with_timestamp(timestamp_get());
 }
 
 /* Set the MMIO Configuration Base Address and Bus Range. */
diff --git a/src/soc/amd/stoneyridge/monotonic_timer.c b/src/soc/amd/stoneyridge/monotonic_timer.c
index 170a640233..7ea571f635 100644
--- a/src/soc/amd/stoneyridge/monotonic_timer.c
+++ b/src/soc/amd/stoneyridge/monotonic_timer.c
@@ -15,12 +15,18 @@
 
 #include <cpu/x86/msr.h>
 #include <timer.h>
+#include <timestamp.h>
 
 #define CU_PTSC_MSR	0xc0010280
 #define PTSC_FREQ_MHZ	100
 
 void timer_monotonic_get(struct mono_time *mt)
 {
+	mono_time_set_usecs(mt, timestamp_get());
+}
+
+uint64_t timestamp_get(void)
+{
 	unsigned long long val;
 	msr_t msr;
 
@@ -28,5 +34,5 @@ void timer_monotonic_get(struct mono_time *mt)
 
 	val = ((unsigned long long)msr.hi << 32) | msr.lo;
 
-	mono_time_set_usecs(mt, val / PTSC_FREQ_MHZ);
+	return val / PTSC_FREQ_MHZ;
 }