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authorMartin Roth <martinroth@google.com>2017-07-13 11:05:35 -0700
committerMartin Roth <martinroth@google.com>2017-07-16 19:22:33 +0000
commit5998198f0c2dc055b2573ad95f03774e755ca3db (patch)
tree4cce06cff492ca50aefba21f721e9f3ae641f5fa /src/soc/amd/stoneyridge
parent99aa6ce053f5122a98713b8353de6b8a72182cad (diff)
downloadcoreboot-5998198f0c2dc055b2573ad95f03774e755ca3db.tar.xz
soc/amd/stoneyridge:Fix IS_ENABLED() around Kconfig symbol references
- Update files that were added since the IS_ENABLED() fix patches - Remove extra XHCI controller. Change-Id: I7028942ce54b06cd048029f7b93f064beba579ad Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20565 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge')
-rw-r--r--src/soc/amd/stoneyridge/acpi/sleepstates.asl2
-rw-r--r--src/soc/amd/stoneyridge/acpi/usb.asl8
-rw-r--r--src/soc/amd/stoneyridge/fadt.c2
-rw-r--r--src/soc/amd/stoneyridge/model_15_init.c4
-rw-r--r--src/soc/amd/stoneyridge/northbridge.c2
5 files changed, 5 insertions, 13 deletions
diff --git a/src/soc/amd/stoneyridge/acpi/sleepstates.asl b/src/soc/amd/stoneyridge/acpi/sleepstates.asl
index d93f068bb7..c8ad5204ee 100644
--- a/src/soc/amd/stoneyridge/acpi/sleepstates.asl
+++ b/src/soc/amd/stoneyridge/acpi/sleepstates.asl
@@ -23,7 +23,7 @@ If (LAnd(SSFG, 0x01)) {
If (LAnd(SSFG, 0x02)) {
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
}
-#if CONFIG_HAVE_ACPI_RESUME
+#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
If (LAnd(SSFG, 0x04)) {
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
}
diff --git a/src/soc/amd/stoneyridge/acpi/usb.asl b/src/soc/amd/stoneyridge/acpi/usb.asl
index b2e5f4914d..30fac2aea9 100644
--- a/src/soc/amd/stoneyridge/acpi/usb.asl
+++ b/src/soc/amd/stoneyridge/acpi/usb.asl
@@ -55,11 +55,3 @@ Device(XHC0) {
Name(_ADR, 0x00100000)
Name(_PRW, Package() {0x0b, 4})
} /* end XHC0 */
-
-#if !CONFIG_SOUTHBRIDGE_AMD_PI_AVALON && !CONFIG_SOUTHBRIDGE_AMD_PI_KERN
-/* 0:10.1 - XHCI 1*/
-Device(XHC1) {
- Name(_ADR, 0x00100001)
- Name(_PRW, Package() {0x0b, 4})
-} /* end XHC1 */
-#endif
diff --git a/src/soc/amd/stoneyridge/fadt.c b/src/soc/amd/stoneyridge/fadt.c
index fb3410c961..f369651f06 100644
--- a/src/soc/amd/stoneyridge/fadt.c
+++ b/src/soc/amd/stoneyridge/fadt.c
@@ -25,7 +25,7 @@
#include <soc/hudson.h>
#include <soc/smi.h>
-#if CONFIG_STONEYRIDGE_LEGACY_FREE
+#if IS_ENABLED(CONFIG_STONEYRIDGE_LEGACY_FREE)
#define FADT_BOOT_ARCH ACPI_FADT_LEGACY_FREE
#else
#define FADT_BOOT_ARCH (ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042)
diff --git a/src/soc/amd/stoneyridge/model_15_init.c b/src/soc/amd/stoneyridge/model_15_init.c
index cad06bf0a5..a46f322d14 100644
--- a/src/soc/amd/stoneyridge/model_15_init.c
+++ b/src/soc/amd/stoneyridge/model_15_init.c
@@ -54,7 +54,7 @@ static void model_15_init(device_t dev)
u8 i;
msr_t msr;
int msrno;
-#if CONFIG_LOGICAL_CPUS
+#if IS_ENABLED(CONFIG_LOGICAL_CPUS)
u32 siblings;
#endif
@@ -92,7 +92,7 @@ static void model_15_init(device_t dev)
/* Enable the local CPU APICs */
setup_lapic();
-#if CONFIG_LOGICAL_CPUS
+#if IS_ENABLED(CONFIG_LOGICAL_CPUS)
siblings = cpuid_ecx(0x80000008) & 0xff;
if (siblings > 0) {
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index fac966fdde..eacd82eccf 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -48,7 +48,7 @@
#define MAX_NODE_NUMS (MAX_NODES * MAX_DIES)
-#if (defined CONFIG_EXT_CONF_SUPPORT) && CONFIG_EXT_CONF_SUPPORT == 1
+#if IS_ENABLED(CONFIG_EXT_CONF_SUPPORT)
#error CONFIG_EXT_CONF_SUPPORT == 1 not support anymore!
#endif