summaryrefslogtreecommitdiff
path: root/src/soc/amd/stoneyridge
diff options
context:
space:
mode:
authorSubrata Banik <subrata.banik@intel.com>2018-01-08 15:28:26 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-01-17 02:04:44 +0000
commit9e3ba212f34c6d9f2eb7dac8e4651f8ce12ab0c0 (patch)
tree61ebc09235481c8964711071b65400ebb81f68f8 /src/soc/amd/stoneyridge
parent9b50a57e4343ce77b8ae1aaca5a3866599056456 (diff)
downloadcoreboot-9e3ba212f34c6d9f2eb7dac8e4651f8ce12ab0c0.tar.xz
soc/intel/cannonlake: Add option to select FSP_CAR
This patch provides an option for non-chrome devices to make use of FSP-T for performing cache-as-ram initialization. Majority of IOTG users are using FSP-T for CAR implementation and aren't able to select FSP_CAR Kconfig from SoC without conflicting with existing CAR config. TEST=Ensure that both the Chrome platform and non Chrome OS platform can select either CAR implementation based on Kconfig options FSP_CAR or CAR_NEM_ENHANCED. By default Chrome platform choose CAR_NEM_ENHANCED Kconfig and non Chrome platforms choose FSP_CAR by default. Change-Id: If565b649fe1c2abdbcf0a740c15db7253c084ae7 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/23161 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge')
0 files changed, 0 insertions, 0 deletions