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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-04 19:54:32 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-07 05:47:33 +0000
commitb2a5f0b9c2eb79f1a9d4fe4f87f1460c1be7fa6d (patch)
tree37b8bd523e8a672853bba15804cb161278824693 /src/soc/amd/stoneyridge
parentfe481eb3e5e8e8d39d892bfcfe085bc7d49ff886 (diff)
downloadcoreboot-b2a5f0b9c2eb79f1a9d4fe4f87f1460c1be7fa6d.tar.xz
cpu/x86/smm: Promote smm_subregion()
No need to limit these declarations to FSP. Both PARALLEL_MP_INIT smm_relocate() and TSEG_STAGE_CACHE can be built on top of this. Change-Id: I7b0b9b8c8bee03aabe251c50c47dc42f6596e169 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34701 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/amd/stoneyridge')
-rw-r--r--src/soc/amd/stoneyridge/cpu.c1
-rw-r--r--src/soc/amd/stoneyridge/include/soc/northbridge.h21
-rw-r--r--src/soc/amd/stoneyridge/ramtop.c1
-rw-r--r--src/soc/amd/stoneyridge/romstage.c1
4 files changed, 3 insertions, 21 deletions
diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c
index f751dc8046..9961153b0b 100644
--- a/src/soc/amd/stoneyridge/cpu.c
+++ b/src/soc/amd/stoneyridge/cpu.c
@@ -18,6 +18,7 @@
#include <cpu/x86/mp.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
+#include <cpu/x86/smm.h>
#include <cpu/amd/msr.h>
#include <cpu/x86/lapic.h>
#include <device/device.h>
diff --git a/src/soc/amd/stoneyridge/include/soc/northbridge.h b/src/soc/amd/stoneyridge/include/soc/northbridge.h
index 60a6ea22bb..a0d7ce88dd 100644
--- a/src/soc/amd/stoneyridge/include/soc/northbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/northbridge.h
@@ -99,27 +99,6 @@
#define NB_CAPABILITIES2 0x84
#define CMP_CAP_MASK 0xff
-enum {
- /* SMM handler area. */
- SMM_SUBREGION_HANDLER,
- /* SMM cache region. */
- SMM_SUBREGION_CACHE,
- /* Chipset specific area. */
- SMM_SUBREGION_CHIPSET,
- /* Total sub regions supported. */
- SMM_SUBREGION_NUM,
-};
-
-/*
- * Fills in the arguments for the entire SMM region covered by chipset
- * protections. e.g. TSEG.
- */
-void smm_region_info(void **start, size_t *size);
-/*
- * Fills in the start and size for the requested SMM subregion. Returns
- * 0 on success, < 0 on failure.
- */
-int smm_subregion(int sub, void **start, size_t *size);
void domain_enable_resources(struct device *dev);
void domain_set_resources(struct device *dev);
void fam15_finalize(void *chip_info);
diff --git a/src/soc/amd/stoneyridge/ramtop.c b/src/soc/amd/stoneyridge/ramtop.c
index 7c855bb1e1..8eb2e39883 100644
--- a/src/soc/amd/stoneyridge/ramtop.c
+++ b/src/soc/amd/stoneyridge/ramtop.c
@@ -19,6 +19,7 @@
#include <stdint.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
+#include <cpu/x86/smm.h>
#include <cpu/amd/msr.h>
#include <cpu/amd/mtrr.h>
#include <cbmem.h>
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index 000d100fa3..4f38dbf138 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -19,6 +19,7 @@
#include <arch/acpi.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
+#include <cpu/x86/smm.h>
#include <cpu/amd/mtrr.h>
#include <cbmem.h>
#include <commonlib/helpers.h>