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author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-10-30 13:24:44 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-03 13:04:04 +0000 |
commit | e6f7c8e8cdb8da6fffc5b34d05d12a2870072765 (patch) | |
tree | d88e3621ae134af2378bc4fe01e76bdfe5b21207 /src/soc/amd/stoneyridge | |
parent | 0486458c730a2424ce2decc43dbea7610eb09957 (diff) | |
download | coreboot-e6f7c8e8cdb8da6fffc5b34d05d12a2870072765.tar.xz |
soc/amd/stoneyridge: Create MMIO ACPI access functions
Now that the relationship between IO access and MMIO access has been
established, create read/write functions to access ACPI standard registers
through MMIO.
BUG=b:118049037
TEST=Build grunt
Change-Id: I32c26f342885c0d99b082be98730edcf16ab5dfc
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/c/29295
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge')
-rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 6 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/sb_util.c | 30 |
2 files changed, 36 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index cb9c4c6e7c..6a66b4c564 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -445,6 +445,12 @@ u32 pm_read32(u8 reg); void pm_write8(u8 reg, u8 value); void pm_write16(u8 reg, u16 value); void pm_write32(u8 reg, u32 value); +u8 acpi_read8(u8 reg); +u16 acpi_read16(u8 reg); +u32 acpi_read32(u8 reg); +void acpi_write8(u8 reg, u8 value); +void acpi_write16(u8 reg, u16 value); +void acpi_write32(u8 reg, u32 value); u32 misc_read32(u8 reg); void misc_write32(u8 reg, u32 value); uint8_t smi_read8(uint8_t offset); diff --git a/src/soc/amd/stoneyridge/sb_util.c b/src/soc/amd/stoneyridge/sb_util.c index 9daf0bbf8d..ccbde7e5d9 100644 --- a/src/soc/amd/stoneyridge/sb_util.c +++ b/src/soc/amd/stoneyridge/sb_util.c @@ -56,6 +56,36 @@ u32 pm_read32(u8 reg) return read32((void *)(PM_MMIO_BASE + reg)); } +u8 acpi_read8(u8 reg) +{ + return read8((void *)(ACPI_REG_MMIO_BASE + reg)); +} + +u16 acpi_read16(u8 reg) +{ + return read16((void *)(ACPI_REG_MMIO_BASE + reg)); +} + +u32 acpi_read32(u8 reg) +{ + return read32((void *)(ACPI_REG_MMIO_BASE + reg)); +} + +void acpi_write8(u8 reg, u8 value) +{ + write8((void *)(ACPI_REG_MMIO_BASE + reg), value); +} + +void acpi_write16(u8 reg, u16 value) +{ + write16((void *)(ACPI_REG_MMIO_BASE + reg), value); +} + +void acpi_write32(u8 reg, u32 value) +{ + write32((void *)(ACPI_REG_MMIO_BASE + reg), value); +} + void smi_write32(uint8_t offset, uint32_t value) { write32((void *)(APU_SMI_BASE + offset), value); |