summaryrefslogtreecommitdiff
path: root/src/soc/amd
diff options
context:
space:
mode:
authorRaul E Rangel <rrangel@chromium.org>2021-05-04 17:01:54 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-05-07 23:18:22 +0000
commit2f195fe167ba3083218d599a66e44d9bbc11c1ba (patch)
tree62117e3a82a30d9a5fc39763a934a97ddd01e4e4 /src/soc/amd
parent6fadde0a5371325dd166c17e27c179db4afa7e55 (diff)
downloadcoreboot-2f195fe167ba3083218d599a66e44d9bbc11c1ba.tar.xz
soc/amd/common/acpi/pci_int.asl: Allow IRQ sharing
PCI interrupts are level active low, so they can be shared. BUG=b:184766519 TEST=Boot guybrush to OS with `pci=nomsi amd_iommu=off noapic` Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I439337dd66fe56790406c6d603e73512c806a19d Reviewed-on: https://review.coreboot.org/c/coreboot/+/52957 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/common/acpi/pci_int.asl6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/common/acpi/pci_int.asl b/src/soc/amd/common/acpi/pci_int.asl
index 06ba0ccbf7..306995d0eb 100644
--- a/src/soc/amd/common/acpi/pci_int.asl
+++ b/src/soc/amd/common/acpi/pci_int.asl
@@ -2,14 +2,14 @@
/* PIC Possible Resource Values */
Name(IRQP, ResourceTemplate() {
- Interrupt(ResourceConsumer, Level, ActiveLow, Exclusive, , , PIC){
+ Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , PIC){
1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 14, 15
}
})
/* IO-APIC Possible Resource Values */
Name(IRQI, ResourceTemplate() {
- Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , APIC) {
+ Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , APIC) {
16, 17, 18, 19, 20, 21, 22, 23
}
})
@@ -63,7 +63,7 @@
ResourceConsumer, \
Level, \
ActiveLow, \
- Exclusive, , , NUMB) \
+ Shared, , , NUMB) \
{ 0 } \
} \
CreateDWordField(local0, NUMB._INT, IRQN) \