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authorMarshall Dawson <marshalldawson3rd@gmail.com>2018-10-05 18:45:15 -0600
committerMartin Roth <martinroth@google.com>2018-10-12 15:16:23 +0000
commitd1aa8eba72c640e94ef410bbb0f37c35ee8c9a5c (patch)
tree4d073e4d5119b2c140fe4814a203b60bff91d588 /src/soc/amd
parentbba0439d09065a3646a85b37b90fcb83a19297c2 (diff)
downloadcoreboot-d1aa8eba72c640e94ef410bbb0f37c35ee8c9a5c.tar.xz
amd/stoneyridge: Rename GppClkCntrl fields
Make the field names of the MISCx00 GPPClkCntrl more manageable by shortening their names. Make the definitions look more like the rest of the header file. Change-Id: I515cd664808e38851a7dbdba899df4fb9bbbcde6 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/29014 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index d25c90ba68..7f02811a3a 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -111,13 +111,13 @@
/* FCH MISC Registers 0xfed80e00 */
#define GPP_CLK_CNTRL 0
-#define GPP_CLK2_CLOCK_REQ_MAP_SHIFT 8
-#define GPP_CLK2_CLOCK_REQ_MAP_MASK (0xf << GPP_CLK2_CLOCK_REQ_MAP_SHIFT)
-#define GPP_CLK2_CLOCK_REQ_MAP_CLK_REQ2 3
+#define GPP_CLK2_REQ_MAP_SHIFT 8
+#define GPP_CLK2_REQ_MAP_MASK (0xf << GPP_CLK2_REQ_MAP_SHIFT)
+#define GPP_CLK2_REQ_MAP_CLK_REQ2 3
-#define GPP_CLK0_CLOCK_REQ_MAP_SHIFT 0
-#define GPP_CLK0_CLOCK_REQ_MAP_MASK (0xf << GPP_CLK0_CLOCK_REQ_MAP_SHIFT)
-#define GPP_CLK0_CLOCK_REQ_MAP_CLK_REQ0 1
+#define GPP_CLK0_REQ_MAP_SHIFT 0
+#define GPP_CLK0_REQ_MAP_MASK (0xf << GPP_CLK0_REQ_MAP_SHIFT)
+#define GPP_CLK0_REQ_MAP_CLK_REQ0 1
#define MISC_CGPLL_CONFIG1 0x08
#define CG1PLL_SPREAD_SPECTRUM_ENABLE BIT(0)