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authorMarshall Dawson <marshalldawson3rd@gmail.com>2019-03-04 10:31:03 -0700
committerMartin Roth <martinroth@google.com>2019-03-07 16:03:07 +0000
commitdbae632fec7d10397a7ce7b80f1fea8d34fb4eda (patch)
tree27dc59fb254a8b750c6d18b16469bef3ff670d14 /src/soc/amd
parent2794a86b1bb54b7feef071bc4fda9e5bb4ffa490 (diff)
downloadcoreboot-dbae632fec7d10397a7ce7b80f1fea8d34fb4eda.tar.xz
util/amdfwtool: Split type field for PSP entries
Separate the type field for the PSP directory table to better match the AMD Platform Security Processor BIOS Architecture Guide (order #55758, NDA only). Instead of a 32-bit type, change to an 8-bit value and an 8-bit subprogram field to allow for a more generic application across family/model products. This patch also eliminates the "fanless" types, previously added for stoneyridge, and converts the --smufnfirmware and --smufnfirmware2 arguments to use a subprogram value of 1. Subsequent patches will change the stoneyridge makefile to use the new option, and eliminate the fanless arguments. TEST=Boot google/grunt, confirm no difference in amdfw.rom file. BUG=b:126691068 Change-Id: If8f33000c31cba21f286f54459de185c21e46268 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31735 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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