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authorRob Barnes <robbarnes@google.com>2020-09-14 07:51:51 -0600
committerAaron Durbin <adurbin@chromium.org>2020-09-16 03:25:28 +0000
commite5aa5ae1ba5bc20af7d4db6e2af3ea9c96900c09 (patch)
tree0bdd9f83e4df2dcc87af4f0442a6491e35bbbf7b /src/soc/amd
parenta01ee36288b26f31fc1e912324293104f33211c3 (diff)
downloadcoreboot-e5aa5ae1ba5bc20af7d4db6e2af3ea9c96900c09.tar.xz
soc/amd/picasso: Convert DDR4 MHz to MT/s correctly
Memory speed is given as an integer in MHz. In some cases it has an implicit fractional speed, so simply multiplying by 2 is not sufficient. Use method from dram/ddr4.c instead. BUG=b:167155849 TEST=Boot ezkinil, check output of 'mosys memory spd print all' and dmidecode -t17 BRANCH=Zork Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Icc77c21932c68ee9f0ff0b8e35ae7b1a3732b322 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45177 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/picasso/dmi.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/src/soc/amd/picasso/dmi.c b/src/soc/amd/picasso/dmi.c
index 5189cd6ac4..1133670043 100644
--- a/src/soc/amd/picasso/dmi.c
+++ b/src/soc/amd/picasso/dmi.c
@@ -14,6 +14,7 @@
#include <lib.h>
#include <dimm_info_util.h>
#include <vendorcode/amd/fsp/picasso/dmi_info.h>
+#include <device/dram/ddr4.h>
/**
* Populate dimm_info using AGESA TYPE17_DMI_INFO.
@@ -27,13 +28,9 @@ static void transfer_memory_info(const TYPE17_DMI_INFO *dmi17,
dimm->ddr_type = dmi17->MemoryType;
- /**
- * TYPE17_DMI_INFO holds speed in MHz.
- * Change to MT/s by multiplying by 2.
- */
- dimm->configured_speed_mts = 2 * dmi17->ConfigSpeed;
+ dimm->configured_speed_mts = ddr4_speed_mhz_to_reported_mts(dmi17->ConfigSpeed);
- dimm->max_speed_mts = 2 * dmi17->Speed;
+ dimm->max_speed_mts = ddr4_speed_mhz_to_reported_mts(dmi17->Speed);
dimm->rank_per_dimm = dmi17->Attributes;