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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-09-13 17:17:16 -0600
committerMartin Roth <martinroth@google.com>2017-09-19 01:22:18 +0000
commit2fd9651b239498a95c749ad3da140aa4d2cb06b8 (patch)
treefb5bdbc9c0bdbe4dbd80db96e3d22d67d031b1c8 /src/soc/amd
parent612ec0ed0a65b4873596ed857075320d2cae837a (diff)
downloadcoreboot-2fd9651b239498a95c749ad3da140aa4d2cb06b8.tar.xz
amd/stoneyridge: Add northbridge definitions
Begin adding D18F1 definitions to northbridge.h. Change-Id: I4fa2f9a4af8fbb3c2919ffb5dca34cbe333bc958 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/21562 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/northbridge.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/northbridge.h b/src/soc/amd/stoneyridge/include/soc/northbridge.h
index 13d7d36270..5984637787 100644
--- a/src/soc/amd/stoneyridge/include/soc/northbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/northbridge.h
@@ -20,6 +20,11 @@
#include <arch/io.h>
#include <device/device.h>
+/* D18F1 - Address Map Registers */
+#define D18F1_DRAM_HOLE 0xf0
+# define DRAM_HOIST_VALID (1 << 1)
+# define DRAM_HOLE_VALID (1 << 0)
+
void cpu_bus_scan(device_t dev);
void domain_enable_resources(device_t dev);
void domain_read_resources(device_t dev);