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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-10-27 16:57:54 -0600 |
|---|---|---|
| committer | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-11-01 21:56:12 +0000 |
| commit | 7a694318e5f549a3860fde0600c93e853e4788d6 (patch) | |
| tree | c976328f7234660f8046698adf18b4db6a30c338 /src/soc/amd | |
| parent | 76db7886f4cbe9a0b2fd8f4c3f5846215afe014b (diff) | |
| download | coreboot-7a694318e5f549a3860fde0600c93e853e4788d6.tar.xz | |
amd/stoneyridge: Add definition for HPET to southbridge
Add #define values for the HPET device. In Stoney Ridge, the base
address is fixed and cannot be relocated.
Change-Id: Id36fd9ecc90d54a92144f2cca7cec6d84abfdabd
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22242
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 55ded9ffa8..78a4038a16 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -25,6 +25,11 @@ #define IO_APIC2_ADDR 0xfec20000 +#if IS_ENABLED(CONFIG_HPET_ADDRESS_OVERRIDE) +#error HPET address override is not allowed and must be fixed at 0xfed00000 +#endif +#define HPET_BASE_ADDRESS 0xfed00000 + /* Offsets from ACPI_MMIO_BASE */ #define APU_SMI_BASE 0xfed80200 |