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authorAaron Durbin <adurbin@chromium.org>2017-09-15 15:23:04 -0600
committerAaron Durbin <adurbin@chromium.org>2017-09-20 23:54:42 +0000
commit0990fbf2d9b8a0070866788b185bdd4bf6e5537e (patch)
tree85b2b519e9d0d5451fc1c63c93bcbdc4552e0cd2 /src/soc/amd
parentfe265a1b9ce7ad5b3dbd19f5857a902494bbe24e (diff)
downloadcoreboot-0990fbf2d9b8a0070866788b185bdd4bf6e5537e.tar.xz
vboot: reset vbnv in cmos when cmos failure occurs
There's an occasional issue on machines which use CMOS for their vbnv storage. The machine that just powers up from complete G3 would have had their RTC rail not held up. The contents of vbnv in CMOS could pass the crc8 though the values could be bad. In order to fix this introduce two functions: 1. vbnv_init_cmos() 2. vbnv_cmos_failed() At the start of vboot the CMOS is queried for failure. If there is a failure indicated then the vbnv data is restored from flash backup or reset to known values when there is no flash backup. BUG=b:63054105 Change-Id: I8bd6f28f64a116b84a08ce4779cd4dc73c0f2f3d Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/21560 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/stoneyridge/Makefile.inc4
-rw-r--r--src/soc/amd/stoneyridge/pmutil.c22
2 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index b6669f1cef..06d9f5820d 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -41,6 +41,7 @@ bootblock-$(CONFIG_STONEYRIDGE_UART) += uart.c
bootblock-y += fixme.c
bootblock-y += bootblock/bootblock.c
bootblock-y += early_setup.c
+bootblock-y += pmutil.c
bootblock-y += tsc_freq.c
romstage-y += romstage.c
@@ -50,12 +51,14 @@ romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
romstage-y += fixme.c
romstage-y += gpio.c
romstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c
+romstage-y += pmutil.c
romstage-y += smbus.c
romstage-y += smbus_spd.c
romstage-y += ramtop.c
romstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
romstage-y += tsc_freq.c
+verstage-y += pmutil.c
verstage-y += reset.c
verstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
verstage-y += tsc_freq.c
@@ -71,6 +74,7 @@ ramstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c
ramstage-y += lpc.c
ramstage-y += model_15_init.c
ramstage-y += northbridge.c
+ramstage-y += pmutil.c
ramstage-y += reset.c
ramstage-y += sata.c
ramstage-y += sm.c
diff --git a/src/soc/amd/stoneyridge/pmutil.c b/src/soc/amd/stoneyridge/pmutil.c
new file mode 100644
index 0000000000..5bbea2ac6b
--- /dev/null
+++ b/src/soc/amd/stoneyridge/pmutil.c
@@ -0,0 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2017 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <vboot/vbnv.h>
+
+int vbnv_cmos_failed(void)
+{
+ /* FIXME: RTC failure checking not supported. */
+ return 0;
+}