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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-09-25 10:00:47 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-11-03 18:40:26 +0000 |
| commit | 5bb0d755669765f93d8f3483667476ca14b96585 (patch) | |
| tree | 01f20b1fe6b2c7fd7280f6718e7357ea8ae9e284 /src/soc/amd | |
| parent | f1f67c3b75039095ef333537b8bf1bde1c41265d (diff) | |
| download | coreboot-5bb0d755669765f93d8f3483667476ca14b96585.tar.xz | |
amd/stoneyridge: Clarify SPD structure in chip.h
Add #define values and clarify the spdAddrLookup array.
Change-Id: I39b9913a2fd52f9105e4a771f651a8d9649202e6
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/21852
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/stoneyridge/chip.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/chip.h b/src/soc/amd/stoneyridge/chip.h index 4e1aa66eea..de6585e164 100644 --- a/src/soc/amd/stoneyridge/chip.h +++ b/src/soc/amd/stoneyridge/chip.h @@ -18,8 +18,12 @@ #include <stdint.h> +#define MAX_NODES 1 +#define MAX_DRAM_CH 1 +#define MAX_DIMMS_PER_CH 2 + struct soc_amd_stoneyridge_config { - u8 spdAddrLookup[1][1][2]; + u8 spdAddrLookup[MAX_NODES][MAX_DRAM_CH][MAX_DIMMS_PER_CH]; }; typedef struct soc_amd_stoneyridge_config config_t; |