diff options
| author | Marc Jones <marcj303@gmail.com> | 2017-06-22 21:39:03 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-31 17:31:44 +0000 |
| commit | a1b07939f1a140be8764c08f6eef0db7c90f5aa0 (patch) | |
| tree | 7616ef6f4215da0aa4c0013b12e9150da3f72e5b /src/soc/amd | |
| parent | 8040fbf9fbd8f26ed4b53a54f92e5dcce20d4a1d (diff) | |
| download | coreboot-a1b07939f1a140be8764c08f6eef0db7c90f5aa0.tar.xz | |
soc/amd/stoneyridge: Add GPIO functions to romstage
A mainboard may access GPIO in romstage.
Change-Id: Id380c6570943ce2a0bf6112d62cc91aeae283fcf
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/20310
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/gpio.h | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index f3c2b1b5d9..30006b3a05 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -48,6 +48,7 @@ romstage-y += early_setup.c romstage-y += dimmSpd.c romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c romstage-y += fixme.c +romstage-y += gpio.c romstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c romstage-y += smbus.c romstage-y += smbus_spd.c diff --git a/src/soc/amd/stoneyridge/include/soc/gpio.h b/src/soc/amd/stoneyridge/include/soc/gpio.h index 06933681c6..f873e52152 100644 --- a/src/soc/amd/stoneyridge/include/soc/gpio.h +++ b/src/soc/amd/stoneyridge/include/soc/gpio.h @@ -16,7 +16,7 @@ #ifndef _STONEYRIDGE_GPIO_H_ #define _STONEYRIDGE_GPIO_H_ -#include <amd_defs.h> +#include <soc/amd/common/amd_defs.h> #include <types.h> #define CROS_GPIO_DEVICE_NAME "AmdKern" |