diff options
author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-11-28 18:59:24 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-01-19 19:49:40 +0000 |
commit | 7214141f5e38692f826e05a5bb10e3e46a8905af (patch) | |
tree | 5c58a84ff8aef1034eb38ea6ce56355d29fcc3e3 /src/soc/amd | |
parent | a89d19a9800a968c0fe4f3eb4218b9babeefb457 (diff) | |
download | coreboot-7214141f5e38692f826e05a5bb10e3e46a8905af.tar.xz |
amd/stoneyridge: Remove unused S3 NVRAM save/restore
Remove the BiosRam read and write functions that were brought over from
the hudson source. The functionality will be superseded later with new
general-purpose functions.
Change-Id: Ib80c66b838fdbdd388a392b4fedaac36bf0bbb0c
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22725
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 2 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 31 |
2 files changed, 0 insertions, 33 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 9f91b505c7..675e071ba9 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -343,8 +343,6 @@ void xhci_pm_write16(uint8_t reg, uint16_t value); uint16_t xhci_pm_read16(uint8_t reg); void xhci_pm_write32(uint8_t reg, uint32_t value); uint32_t xhci_pm_read32(uint8_t reg); -int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos); -int s3_save_nvram_early(u32 dword, int size, int nvram_pos); void bootblock_fch_early_init(void); /** * @brief Find the size of a particular wide IO diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 2dd0251503..863a4ef01e 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -451,37 +451,6 @@ void bootblock_fch_early_init(void) sb_lpc_decode(); } -int s3_save_nvram_early(u32 dword, int size, int nvram_pos) -{ - int i; - printk(BIOS_DEBUG, "Writing %x of size %d to nvram pos: %d\n", - dword, size, nvram_pos); - - for (i = 0; i < size; i++) { - outb(nvram_pos, BIOSRAM_INDEX); - outb((dword >> (8 * i)) & 0xff, BIOSRAM_DATA); - nvram_pos++; - } - - return nvram_pos; -} - -int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) -{ - u32 data = *old_dword; - int i; - for (i = 0; i < size; i++) { - outb(nvram_pos, BIOSRAM_INDEX); - data &= ~(0xff << (i * 8)); - data |= inb(BIOSRAM_DATA) << (i * 8); - nvram_pos++; - } - *old_dword = data; - printk(BIOS_DEBUG, "Loading %x of size %d to nvram pos:%d\n", - *old_dword, size, nvram_pos-size); - return nvram_pos; -} - void sb_enable(device_t dev) { printk(BIOS_DEBUG, "%s\n", __func__); |