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| author | Rob Barnes <robbarnes@google.com> | 2020-08-17 22:50:10 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-24 09:13:54 +0000 |
| commit | bcab8b0a411adaa6f2791ec5ea36d73efc0aa1e9 (patch) | |
| tree | d80b8f5261346d303c15ac05147cf09aabd6c194 /src/soc/amd | |
| parent | 9618706da64736e421aa8fd4d0da42aff079a77d (diff) | |
| download | coreboot-bcab8b0a411adaa6f2791ec5ea36d73efc0aa1e9.tar.xz | |
soc/amd/picasso: Store ddr_frequency in MT/s
This field eventually gets interpreted as MT/s by SMBIOS instead of MHz. Translate from Mhz to MT/s by multiplying by 2.
BUG=b:154654737
TEST=dmidecode -t 17 matches expected speed
Change-Id: I51b58cb0380f2a2bf000347395ac918ac0717060
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44540
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/picasso/dmi.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/soc/amd/picasso/dmi.c b/src/soc/amd/picasso/dmi.c index 860778d76f..3988616896 100644 --- a/src/soc/amd/picasso/dmi.c +++ b/src/soc/amd/picasso/dmi.c @@ -27,7 +27,15 @@ static void transfer_memory_info(const TYPE17_DMI_INFO *dmi17, dimm->ddr_type = dmi17->MemoryType; - dimm->ddr_frequency = dmi17->Speed; + /** + * Based on the name, ddr_frequency should hold the memory clock + * frequency in MHz. However it is interpreted as MT/s in SMBIOS + * downstream. So multiply by 2 to translate to memory speed in MT/s. + * ddr_frequency is used for setting both config speed and max + * speed. Using config speed so we don't get the false impression + * that the RAM is running faster than it actually is. + */ + dimm->ddr_frequency = 2 * dmi17->ConfigSpeed; dimm->rank_per_dimm = dmi17->Attributes; |