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| author | Shamile Khan <shamile.khan@intel.com> | 2019-01-11 16:25:44 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-23 14:55:47 +0000 |
| commit | 6f86ff3ac85beefe73026b58ddcbe9f54be6ea46 (patch) | |
| tree | 1929571f15ed2ee7d674b35439fefc2cd4cf790b /src/soc/amd | |
| parent | 300b25a910330ea5d2df4758bb06e77cf81c87b3 (diff) | |
| download | coreboot-6f86ff3ac85beefe73026b58ddcbe9f54be6ea46.tar.xz | |
mb/intel/glkrvp: Fix termination for dual voltage pins
These pins should not have pull downs configured in standby state as that
can cause contention on the termination circuitry and lead to incorrect
behavior as per Doc# 572688 Gemini Lake Processor GPIO Termination
Configuration.
BUG=b:79982669
TEST=Checked that code compiles with changes.
Change-Id: I8156c67df152555ecf9e7be9e4851468538bcff1
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://review.coreboot.org/c/30867
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: John Zhao <john.zhao@intel.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd')
0 files changed, 0 insertions, 0 deletions