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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-11-07 12:37:12 -0700
committerAaron Durbin <adurbin@chromium.org>2017-11-10 19:18:10 +0000
commitbf131b26165125d452b694ef83926c2c32bf99d0 (patch)
tree56dbccf28451e94b6153b8c67e3c3ad727598947 /src/soc/amd
parent0756880b804a3798561937220e471321c05d6c81 (diff)
downloadcoreboot-bf131b26165125d452b694ef83926c2c32bf99d0.tar.xz
amd/stoneyridge: Implement vboot_platform_is_resuming
Change-Id: I23882ad8cd93fbc25acd8a07eca6a78b6bafc191 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/22414 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/stoneyridge/Makefile.inc1
-rw-r--r--src/soc/amd/stoneyridge/pmutil.c11
2 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index 921691f432..197145aee4 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -58,6 +58,7 @@ romstage-y += ramtop.c
romstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
romstage-y += tsc_freq.c
+verstage-y += sb_util.c
verstage-y += pmutil.c
verstage-y += reset.c
verstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
diff --git a/src/soc/amd/stoneyridge/pmutil.c b/src/soc/amd/stoneyridge/pmutil.c
index 89d3640801..25c9ec15c1 100644
--- a/src/soc/amd/stoneyridge/pmutil.c
+++ b/src/soc/amd/stoneyridge/pmutil.c
@@ -13,6 +13,9 @@
* GNU General Public License for more details.
*/
+#include <arch/acpi.h>
+#include <soc/southbridge.h>
+#include <security/vboot/vboot_common.h>
#include <security/vboot/vbnv.h>
int vbnv_cmos_failed(void)
@@ -20,3 +23,11 @@ int vbnv_cmos_failed(void)
/* FIXME: RTC failure checking not supported. */
return 0;
}
+
+int vboot_platform_is_resuming(void)
+{
+ if (!(inw(pm_acpi_pm_evt_blk()) & WAK_STS))
+ return 0;
+
+ return acpi_sleep_from_pm1(inw(pm_acpi_pm_cnt_blk())) == ACPI_S3;
+}