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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-16 15:13:00 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-21 16:37:33 +0000
commitc2741855afacd073d370d47818d972cca9baba18 (patch)
tree41522e0abfe2796935511eb92db068dc49a62a38 /src/soc/amd
parent16562cb859ad323153a9fe6d8b3890cc7dd73093 (diff)
downloadcoreboot-c2741855afacd073d370d47818d972cca9baba18.tar.xz
arch/x86: Rename some mainboard_romstage_entry()
These platforms use different signature for this function, so declare them with different name to make room in global namespace. Change-Id: I77be9099bf20e00ae6770e9ffe12301eda028819 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34909 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/picasso/include/soc/romstage.h2
-rw-r--r--src/soc/amd/picasso/romstage.c4
-rw-r--r--src/soc/amd/stoneyridge/include/soc/romstage.h2
-rw-r--r--src/soc/amd/stoneyridge/romstage.c4
4 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/amd/picasso/include/soc/romstage.h b/src/soc/amd/picasso/include/soc/romstage.h
index d8b2900fb5..c0d03d0ead 100644
--- a/src/soc/amd/picasso/include/soc/romstage.h
+++ b/src/soc/amd/picasso/include/soc/romstage.h
@@ -16,6 +16,6 @@
#ifndef __PICASSO_ROMSTAGE_H__
#define __PICASSO_ROMSTAGE_H__
-void mainboard_romstage_entry(int s3_resume);
+void mainboard_romstage_entry_s3(int s3_resume);
#endif /* __PICASSO_ROMSTAGE_H__ */
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c
index 22b5ce4be0..7970b0edda 100644
--- a/src/soc/amd/picasso/romstage.c
+++ b/src/soc/amd/picasso/romstage.c
@@ -34,7 +34,7 @@
#include "chip.h"
-void __weak mainboard_romstage_entry(int s3_resume)
+void __weak mainboard_romstage_entry_s3(int s3_resume)
{
/* By default, don't do anything */
}
@@ -49,7 +49,7 @@ asmlinkage void car_stage_entry(void)
console_init();
- mainboard_romstage_entry(s3_resume);
+ mainboard_romstage_entry_s3(s3_resume);
if (!s3_resume) {
post_code(0x40);
diff --git a/src/soc/amd/stoneyridge/include/soc/romstage.h b/src/soc/amd/stoneyridge/include/soc/romstage.h
index 6ce79b424e..598b409ba5 100644
--- a/src/soc/amd/stoneyridge/include/soc/romstage.h
+++ b/src/soc/amd/stoneyridge/include/soc/romstage.h
@@ -16,6 +16,6 @@
#ifndef __STONEYRIDGE_ROMSTAGE_H__
#define __STONEYRIDGE_ROMSTAGE_H__
-void mainboard_romstage_entry(int s3_resume);
+void mainboard_romstage_entry_s3(int s3_resume);
#endif /* __STONEYRIDGE_ROMSTAGE_H__ */
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index 4cadc68a89..c76f7cd80c 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -37,7 +37,7 @@
#include "chip.h"
-void __weak mainboard_romstage_entry(int s3_resume)
+void __weak mainboard_romstage_entry_s3(int s3_resume)
{
/* By default, don't do anything */
}
@@ -97,7 +97,7 @@ asmlinkage void car_stage_entry(void)
if (CONFIG(SOC_AMD_PSP_SELECTABLE_SMU_FW))
load_smu_fw1();
- mainboard_romstage_entry(s3_resume);
+ mainboard_romstage_entry_s3(s3_resume);
bsp_agesa_call();