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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-10-31 15:47:03 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-02 06:28:53 +0000
commit2ca11a527c0be3669fadaa7f681e5a21e7d6460f (patch)
treef6f5f499f1ac15df32ffbbdd790f8f7855db500b /src/soc/amd
parent432516586e7f646aa2a8ac0cbdf8e80ac44f97d0 (diff)
downloadcoreboot-2ca11a527c0be3669fadaa7f681e5a21e7d6460f.tar.xz
soc/amd/stoneyridge: Remove UDELAY_LAPIC_FIXED_FSB
We only need this defined with udelay() implementation on top of LAPIC_MONOTONIC_TIMER. Change-Id: I490245fa0d57de3a6e8609e735f668626cf1201e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36526 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/stoneyridge/Kconfig4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 72719d7179..0e559371fa 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -86,10 +86,6 @@ config VBOOT
select VBOOT_VBNV_CMOS
select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH
-config UDELAY_LAPIC_FIXED_FSB
- int
- default 200
-
# TODO: Sync these with definitions in PI vendorcode.
# DCACHE_RAM_BASE must equal BSP_STACK_BASE_ADDR.
# DCACHE_RAM_SIZE must equal BSP_STACK_SIZE.