broadcom/cygnus: add new SoC driver

This commit covers bootblock and romstage.

BUG=none
BRANCH=tot
TEST=ran emerge-purin coreboot

Change-Id: I88e2dffb9e46ba5b066190e844a6a7302adcfdc7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b3af6343a74263f086fe82c600559e8204e7dec0
Original-Change-Id: I447ed5f6ed181cfc9d5521b8c57e5fe0036a3f71
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/242854
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9750
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

4 files changed, 99 insertions, 0 deletions

diff --git a/src/soc/broadcom/cygnus/include/soc/gpio.h b/src/soc/broadcom/cygnus/include/soc/gpio.h
new file mode 100644
index 0000000000..2d9d8f4911
--- /dev/null
+++ b/src/soc/broadcom/cygnus/include/soc/gpio.h
@@ -0,0 +1,8 @@
+#ifndef __SOC_BROADCOM_CYGNUS_GPIO_H__
+#define __SOC_BROADCOM_CYGNUS_GPIO_H__
+
+#include <types.h>
+
+typedef u32 gpio_t;
+
+#endif	/* __SOC_BROADCOM_CYGNUS_GPIO_H__ */
diff --git a/src/soc/broadcom/cygnus/include/soc/i2c.h b/src/soc/broadcom/cygnus/include/soc/i2c.h
new file mode 100644
index 0000000000..18b6eec90a
--- /dev/null
+++ b/src/soc/broadcom/cygnus/include/soc/i2c.h
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __SOC_BROADCOM_CYGNUS_I2C_H__
+#define __SOC_BROADCOM_CYGNUS_I2C_H__
+
+void i2c_init(unsigned int bus, unsigned int hz);
+
+#endif	/* __SOC_BROADCOM_CYGNUS_I2C_H__ */
diff --git a/src/soc/broadcom/cygnus/include/soc/memlayout.ld b/src/soc/broadcom/cygnus/include/soc/memlayout.ld
new file mode 100644
index 0000000000..41d13fd7c5
--- /dev/null
+++ b/src/soc/broadcom/cygnus/include/soc/memlayout.ld
@@ -0,0 +1,41 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <memlayout.h>
+#include <vendorcode/google/chromeos/memlayout.h>
+
+#include <arch/header.ld>
+
+SECTIONS
+{
+	DRAM_START(0x00000000)
+	RAMSTAGE(0x00200000, 128K)
+	POSTRAM_CBFS_CACHE(0x01000000, 1M)
+
+	SRAM_START(0x61000000)
+	TTB(0x61000000, 16K)
+	BOOTBLOCK(0x61004000, 16K)
+	PRERAM_CBMEM_CONSOLE(0x61008000, 4K)
+	VBOOT2_WORK(0x61009000, 12K)
+	OVERLAP_VERSTAGE_ROMSTAGE(0x6100C000, 40K)
+	PRERAM_CBFS_CACHE(0x61016000, 1K)
+	CBFS_HEADER_OFFSET(0x61016800)
+	STACK(0x61017800, 4K)
+	SRAM_END(0x610040000)
+}
diff --git a/src/soc/broadcom/cygnus/include/soc/sdram.h b/src/soc/broadcom/cygnus/include/soc/sdram.h
new file mode 100644
index 0000000000..573364dfe3
--- /dev/null
+++ b/src/soc/broadcom/cygnus/include/soc/sdram.h
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __SOC_BROADCOM_CYGNUS_SDRAM_H__
+#define __SOC_BROADCOM_CYGNUS_SDRAM_H__
+
+void sdram_init(void);
+
+#endif	/* __SOC_BROADCOM_CYGNUS_SDRAM_H__ */