google/purin: add DMA coherent region

BUG=none
BRANCH=broadcom-firmware
TEST=boot to depthcharge

Change-Id: Id10437c12e219e07121395abd442d53b3b56c7be
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f33e9218ca8df1d149761c09253c30837b607433
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chrome-internal-review.googlesource.com/204757
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Daisuke Nojiri <dnojiri@google.com>
Original-Tested-by: Daisuke Nojiri <dnojiri@google.com>
Original-Change-Id: I93def9c326cc8b4fea69078987bddf09d9f2a797
Original-Reviewed-on: https://chromium-review.googlesource.com/256417
Reviewed-on: http://review.coreboot.org/9854
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 51 insertions, 0 deletions

diff --git a/src/soc/broadcom/cygnus/soc.c b/src/soc/broadcom/cygnus/soc.c
new file mode 100644
index 0000000000..c9597f2b08
--- /dev/null
+++ b/src/soc/broadcom/cygnus/soc.c
@@ -0,0 +1,51 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <device/device.h>
+#include <soc/sdram.h>
+#include <stddef.h>
+#include <stdlib.h>
+#include <symbols.h>
+
+static void soc_init(device_t dev)
+{
+	ram_resource(dev, 0, (uintptr_t)_dram/KiB, sdram_size_mb()*(MiB/KiB));
+}
+
+static void soc_noop(device_t dev)
+{
+}
+
+static struct device_operations soc_ops = {
+	.read_resources   = soc_noop,
+	.set_resources    = soc_noop,
+	.enable_resources = soc_noop,
+	.init             = soc_init,
+	.scan_bus         = 0,
+};
+
+static void enable_cygnus_dev(device_t dev)
+{
+	dev->ops = &soc_ops;
+}
+
+struct chip_operations soc_broadcom_cygnus_ops = {
+	CHIP_NAME("SOC Broadcom Cygnus")
+	.enable_dev = enable_cygnus_dev,
+};