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authorMartin Roth <martinroth@google.com>2016-07-29 14:07:30 -0600
committerStefan Reinauer <stefan.reinauer@coreboot.org>2016-08-01 21:44:45 +0200
commit0cd338e6e489eacfedb8fab3ff161b1578d08f07 (patch)
tree8b729260de5a406dc22869ff5c5236ba77fbb0ed /src/soc/broadcom
parentbb9722bd775d575401edff14a9b80406ecbd974a (diff)
downloadcoreboot-0cd338e6e489eacfedb8fab3ff161b1578d08f07.tar.xz
Remove non-ascii & unprintable characters
These non-ascii & unprintable characters aren't needed. Change-Id: I129f729f66d6a692de729d76971f7deb7a19c254 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/15977 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/broadcom')
-rw-r--r--src/soc/broadcom/cygnus/ddr_init.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/broadcom/cygnus/ddr_init.c b/src/soc/broadcom/cygnus/ddr_init.c
index b08e3c0a3c..abf034bc86 100644
--- a/src/soc/broadcom/cygnus/ddr_init.c
+++ b/src/soc/broadcom/cygnus/ddr_init.c
@@ -97,8 +97,8 @@ void PRE_SRX(void)
readvalue = reg32_read ((volatile uint32_t *)DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL);
reg32_write ((volatile uint32_t *)DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL, ( readvalue & ~(1 << DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL__IDDQ)));
- // Turn on PHY_CONTROL AUTO_OEB ¨C not required
- // Enable byte lane AUTO_DQ_RXENB_MODE: bits 18 and 19 of the byte lane IDLE_PAD_CONTROL ¨C already set 180114c8: 000f000a
+ // Turn on PHY_CONTROL AUTO_OEB C not required
+ // Enable byte lane AUTO_DQ_RXENB_MODE: bits 18 and 19 of the byte lane IDLE_PAD_CONTROL C already set 180114c8: 000f000a
printk(BIOS_INFO, "\n....PLL power up.\n");
reg32_write((volatile uint32_t *)DDR_PHY_CONTROL_REGS_PLL_CONFIG, (reg32_read((volatile uint32_t *)DDR_PHY_CONTROL_REGS_PLL_CONFIG) & ~(1<<DDR_PHY_CONTROL_REGS_PLL_CONFIG__PWRDN)));