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author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2018-03-26 15:54:41 +0200 |
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committer | Patrick Rudolph <siro@das-labor.org> | 2018-07-10 07:03:29 +0000 |
commit | 06c7d64be9fa0355ed7cfc092db93963a254295a (patch) | |
tree | 3082efb85b5e6b0f3c67be16818524039fdea84e /src/soc/cavium/cn81xx/Makefile.inc | |
parent | 8cbd569f74d8929387730e45b0d6e993b1365c02 (diff) | |
download | coreboot-06c7d64be9fa0355ed7cfc092db93963a254295a.tar.xz |
soc/cavium: Enable MMU
* Configure and enable MMU.
* Cover the whole I/O space.
* A minimum of 512KB TTB space is required.
* Use secure mem attribute as firmware is running in ARM TZ region.
Tested on Cavium SoC.
Change-Id: I969446da62b4cc7adf9393fab69ff84ebf49220d
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25371
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/soc/cavium/cn81xx/Makefile.inc')
-rw-r--r-- | src/soc/cavium/cn81xx/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/cavium/cn81xx/Makefile.inc b/src/soc/cavium/cn81xx/Makefile.inc index d265c19bb8..2e12b0137c 100644 --- a/src/soc/cavium/cn81xx/Makefile.inc +++ b/src/soc/cavium/cn81xx/Makefile.inc @@ -42,6 +42,8 @@ romstage-$(CONFIG_DRIVERS_UART) += uart.c romstage-< += cpu.c romstage-y += sdram.c +romstage-y += mmu.c + romstage-y += ../common/cbmem.c # BDK coreboot interface romstage-y += ../common/bdk-coreboot.c |