soc/cn81xx: Add vboot support

* Add VERSTAGE and VBOOT_WORK to memlayout.
* Add hard and soft reset.
* Add missing makefile and kconfig includes.

Change-Id: I0d7e3c220f5c2c50c4ffe59ac929cb865bfac0ad
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/28022
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>

1 files changed, 15 insertions, 0 deletions

diff --git a/src/soc/cavium/cn81xx/Makefile.inc b/src/soc/cavium/cn81xx/Makefile.inc
index 2179bc7ec8..d212715d80 100644
--- a/src/soc/cavium/cn81xx/Makefile.inc
+++ b/src/soc/cavium/cn81xx/Makefile.inc
@@ -25,11 +25,24 @@ bootblock-y += timer.c
 bootblock-y += spi.c
 bootblock-y += uart.c
 bootblock-y += cpu.c
+bootblock-y += reset.c
 ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
 bootblock-$(CONFIG_DRIVERS_UART) += uart.c
 endif
 
 ################################################################################
+# verstage
+
+verstage-y += twsi.c
+verstage-y += clock.c
+verstage-y += gpio.c
+verstage-y += timer.c
+verstage-y += spi.c
+verstage-$(CONFIG_DRIVERS_UART) += uart.c
+verstage-y += cbmem.c
+verstage-y += reset.c
+
+################################################################################
 # romstage
 
 romstage-y += twsi.c
@@ -40,6 +53,7 @@ romstage-y += spi.c
 romstage-y += uart.c
 romstage-$(CONFIG_DRIVERS_UART) += uart.c
 romstage-y += cbmem.c
+romstage-y += reset.c
 
 romstage-y += sdram.c
 romstage-y += mmu.c
@@ -60,6 +74,7 @@ ramstage-y += cpu.c
 ramstage-y += cpu_secondary.S
 ramstage-y += ecam0.c
 ramstage-y += cbmem.c
+ramstage-y += reset.c
 
 ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c