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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2018-04-17 13:47:55 +0200 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-07-19 13:57:24 +0000 |
| commit | d0c6797e796af155cd435ed344958dbb9c418a86 (patch) | |
| tree | 57bc66cdea7783d3d6025d7df458fc790f4bece6 /src/soc/cavium/cn81xx/soc.c | |
| parent | 02c08147645d37e8d21f89b62cb7029be7543bd6 (diff) | |
| download | coreboot-d0c6797e796af155cd435ed344958dbb9c418a86.tar.xz | |
soc/cavium: Add PCI support
* Add support for secure/unsecure split
* Use MMCONF to access devices in domain0
* Program MSIX vectors to fix a crash in GNU/Linux
Tested on Cavium CN81XX_EVB.
All PCI devices are visible.
Change-Id: I881f38a26a165e6bd965fcd73547473b5e32d4b0
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25750
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/cavium/cn81xx/soc.c')
| -rw-r--r-- | src/soc/cavium/cn81xx/soc.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/soc/cavium/cn81xx/soc.c b/src/soc/cavium/cn81xx/soc.c index 6c68bb2fe5..5e540a6765 100644 --- a/src/soc/cavium/cn81xx/soc.c +++ b/src/soc/cavium/cn81xx/soc.c @@ -29,6 +29,7 @@ #include <string.h> #include <symbols.h> #include <libbdk-boot/bdk-boot.h> +#include <soc/ecam0.h> static void soc_read_resources(device_t dev) { @@ -59,7 +60,12 @@ static struct device_operations soc_ops = { static void enable_soc_dev(device_t dev) { - dev->ops = &soc_ops; + if (dev->path.type == DEVICE_PATH_DOMAIN && + dev->path.domain.domain == 0) { + dev->ops = &pci_domain_ops_ecam0; + } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { + dev->ops = &soc_ops; + } } struct chip_operations soc_cavium_cn81xx_ops = { |