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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2018-03-28 12:28:02 +0200 |
|---|---|---|
| committer | Patrick Rudolph <siro@das-labor.org> | 2018-07-10 07:03:56 +0000 |
| commit | d0dcf877e4dc85f951e6c8c53702292fff060bc6 (patch) | |
| tree | a489f34400750043051ae67aff61ec81849ec0ad /src/soc/cavium/cn81xx/uart.c | |
| parent | 06c7d64be9fa0355ed7cfc092db93963a254295a (diff) | |
| download | coreboot-d0dcf877e4dc85f951e6c8c53702292fff060bc6.tar.xz | |
soc/cavium: Clean uart code
* Only init UART_FOR_CONSOLE
* Allow UART init with zero baudrate.
* Init UART0..3 on Cavium's cn8100_sff_evb to fix kernel panic.
Tested on CN8100_SFF_EVB.
Change-Id: I1043b30318ec6210e2dd6b7ac313a41171d37f55
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25448
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/soc/cavium/cn81xx/uart.c')
| -rw-r--r-- | src/soc/cavium/cn81xx/uart.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/cavium/cn81xx/uart.c b/src/soc/cavium/cn81xx/uart.c index 9fb83871ad..7a9ea3a158 100644 --- a/src/soc/cavium/cn81xx/uart.c +++ b/src/soc/cavium/cn81xx/uart.c @@ -233,6 +233,14 @@ int uart_setup(const size_t bus, int baudrate) write64(&uart->uctl_ctl, ctl.u); /** + * Exit here if the UART is not going to be used in coreboot. + * The previous initialization steps are sufficient to make the Linux + * kernel not panic. + */ + if (!baudrate) + return 0; + + /** * 7. Initialize the integer and fractional baud rate divider registers * UARTIBRD and UARTFBRD as follows: * a. Baud Rate Divisor = UARTCLK/(16xBaud Rate) = BRDI + BRDF |