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authorRizwan Qureshi <rizwan.qureshi@intel.com>2019-02-26 18:12:05 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-02-27 11:04:40 +0000
commite64c25ca1a550132e1ad35208d6a71d553d57879 (patch)
tree9e906683553e3d6d3ce23e4e5d3405c1d1b7a706 /src/soc/cavium
parent51749b276644f6e74c0f9e90647a0f752ac627d3 (diff)
downloadcoreboot-e64c25ca1a550132e1ad35208d6a71d553d57879.tar.xz
soc/intel/cannonlake: Add ASL functions to manipulate RX/TX buffers
Add a function in gpio ASL library to enable/disable pad Rx/Tx Buffers. BUG=b:123350329 Change-Id: I6c40d79debb61b0c4e96e485b410d446b77d9cf6 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/c/31619 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Furquan Shaikh <furquan@google.com>
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