diff options
author | Julius Werner <jwerner@chromium.org> | 2019-12-04 20:32:15 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-11 11:42:26 +0000 |
commit | 8245bd25a35466248c00bc7a4d0cf96f8391924a (patch) | |
tree | 5e3cc97038c161661fdaa0015ad37f1d73f4219c /src/soc/cavium | |
parent | ad27283a3c777f288254974cac233e47d1c0005d (diff) | |
download | coreboot-8245bd25a35466248c00bc7a4d0cf96f8391924a.tar.xz |
fmap: Make FMAP_CACHE mandatory if it is configured in
Now that we have a CONFIG_NO_FMAP_CACHE to completely configure out the
pre-RAM FMAP cache code, there's no point in allowing the region to be
optional anymore. This patch makes the section required by the linker.
If a board doesn't want to provide it, it has to select NO_FMAP_CACHE.
Adding FMAP_CACHE regions to a couple more targets that I think can use
them but I don't know anything about... please yell if one of these is
a bad idea and I should mark them NO_FMAP_CACHE instead.
Change-Id: Ic7d47772ab3abfa7e3a66815c3739d0af071abc2
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37497
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/cavium')
-rw-r--r-- | src/soc/cavium/cn81xx/include/soc/memlayout.ld | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/cavium/cn81xx/include/soc/memlayout.ld b/src/soc/cavium/cn81xx/include/soc/memlayout.ld index e4e3490395..1a0eb155b7 100644 --- a/src/soc/cavium/cn81xx/include/soc/memlayout.ld +++ b/src/soc/cavium/cn81xx/include/soc/memlayout.ld @@ -31,7 +31,8 @@ SECTIONS STACK(BOOTROM_OFFSET, 16K) TIMESTAMP(BOOTROM_OFFSET + 0x4000, 4K) - PRERAM_CBFS_CACHE(BOOTROM_OFFSET + 0x6000, 8K) + PRERAM_CBFS_CACHE(BOOTROM_OFFSET + 0x6000, 6K) + FMAP_CACHE(BOOTROM_OFFSET + 0x7800, 2K) PRERAM_CBMEM_CONSOLE(BOOTROM_OFFSET + 0x8000, 8K) BOOTBLOCK(BOOTROM_OFFSET + 0x20000, 64K) VBOOT2_WORK(BOOTROM_OFFSET + 0x30000, 12K) |