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authorJens Drenhaus <jens.drenhaus@9elements.com>2018-10-09 13:02:49 +0200
committerPatrick Rudolph <siro@das-labor.org>2018-10-10 16:37:38 +0000
commitfe66a0760c00bfe55b20211955f740f00efb704a (patch)
tree01814f28ea9a84255763cb41998cfc74911c213e /src/soc/cavium
parent6ae7a2a10110fb86a8f4447433bb431a8ec37cb5 (diff)
downloadcoreboot-fe66a0760c00bfe55b20211955f740f00efb704a.tar.xz
soc/cavium: dynamic UART initialization for cavium cn8100
Now only those UARTs that are enabled in devicetree.cb are initialized. Tested on Opencellular Elgon. Change-Id: I145c224148f0cc078bb1c76f588f603e73121a62 Signed-off-by: Jens Drenhaus <jens.drenhaus@9elements.com> Reviewed-on: https://review.coreboot.org/28975 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/soc/cavium')
-rw-r--r--src/soc/cavium/cn81xx/soc.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/src/soc/cavium/cn81xx/soc.c b/src/soc/cavium/cn81xx/soc.c
index d9eb052027..0bf76f7424 100644
--- a/src/soc/cavium/cn81xx/soc.c
+++ b/src/soc/cavium/cn81xx/soc.c
@@ -24,6 +24,7 @@
#include <soc/clock.h>
#include <soc/sdram.h>
#include <soc/timer.h>
+#include <soc/uart.h>
#include <stddef.h>
#include <stdlib.h>
#include <string.h>
@@ -207,6 +208,21 @@ static int dt_platform_fixup(struct device_tree_fixup *fixup,
printk(BIOS_ERR, "%s: Node not found. OS might miss-behave !\n",
__func__);
+ /* Remove unused UART entries */
+ for (i = 0; i < 4; i++) {
+ char path[32];
+ const uint64_t addr = UAAx_PF_BAR0(i);
+ /* Remove the node */
+ snprintf(path, sizeof(path), "soc@0/serial@%llx", addr);
+ dt_node = dt_find_node_by_path(tree->root, path, NULL, NULL, 0);
+ if (!dt_node || uart_is_enabled(i)) {
+ printk(BIOS_INFO, "%s: ignoring %s\n", __func__, path);
+ continue;
+ }
+ printk(BIOS_INFO, "%s: Removing node %s\n", __func__, path);
+ list_remove(&dt_node->list_node);
+ }
+
/* Remove unused PEM entries */
for (i = 0; i < 8; i++) {
char path[32];
@@ -374,6 +390,18 @@ static void soc_init(struct device *dev)
}
}
+ /* Init UARTs */
+ size_t i;
+ struct device *uart_dev;
+ for (i = 0; i <= 3; i++) {
+ uart_dev = dev_find_slot(1, PCI_DEVFN(8, i));
+ /* using device enable state from devicetree.cb */
+ if (uart_dev && uart_dev->enabled) {
+ if (!uart_is_enabled(i))
+ uart_setup(i, 0);
+ }
+ }
+
if (IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE))
soc_init_atf();
}