summaryrefslogtreecommitdiff
path: root/src/soc/cavium
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2020-05-23 13:26:04 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-07-14 16:10:17 +0000
commit225be5f7eeb7f1684314009b1da249fb7d9b5aef (patch)
tree95976cecd0f15f63dfe1e7d0821c9ef355c17c85 /src/soc/cavium
parent5a8e072020a4cfd77ffd03c9b58c3751370a9978 (diff)
downloadcoreboot-225be5f7eeb7f1684314009b1da249fb7d9b5aef.tar.xz
src: Remove unused 'include <types.h>'
Files found using: diff <(git grep -l '#include <types.h>' -- src/) <(git grep -l 'BIT(\|size_t\|wchar_t\|wint_t\|NULL\|DEVTREE_EARLY\|DEVTREE_CONST\|MAYBE_STATIC_NONZERO\|zeroptr\|int8_t\|int16_t\|int32_t\|int64_t\|intptr_t\|intmax_t\|s8\|u8\|s16\|u16\|s32\|u32\|s64\|u64\|INT8_MIN\|INT8_MAX\|INT16_MIN\|INT16_MAX\|INT32_MIN\|INT32_MAX\|INT64_MIN\|INT64_MAX\|INTMAX_MIN\|INTMAX_MAX\|bool\|true\|false\|cb_err\|CB_SUCCESS\|CB_ERR\|CB_ERR_ARG\|CB_CMOS_\|CB_KBD_\|CB_I2C_\|cb_err_t\|DIV_ROUND_CLOSEST\|container_of\|__unused\|alloca(\|ARRAY_SIZE\|ALIGN\|ALIGN_UP\|ALIGN_DOWN\|IS_ALIGNED\|__CMP_UNSAFE\|MIN_UNSAFE\|MAX_UNSAFE\|__CMP_SAFE\|__CMP\|MIN(\|MAX(\|ABS(\|IS_POWER_OF_2\|POWER_OF_2\|DIV_ROUND_UP\|SWAP(\|KiB\|MiB\|GiB\|KHz\|MHz\|GHz\|offsetof(\|check_member\|member_size' -- src/)|grep -v vendor |grep '<' Change-Id: I5d99d844cc58d80acb505d98da9d3ec76319b2eb Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41677 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/cavium')
-rw-r--r--src/soc/cavium/cn81xx/include/soc/twsi.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/cavium/cn81xx/include/soc/twsi.h b/src/soc/cavium/cn81xx/include/soc/twsi.h
index 9756c6ac38..436df573e6 100644
--- a/src/soc/cavium/cn81xx/include/soc/twsi.h
+++ b/src/soc/cavium/cn81xx/include/soc/twsi.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <types.h>
+
#include <device/i2c.h>
#ifndef __SOC_CAVIUM_CN81XX_INCLUDE_SOC_TWSI_H