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authorPatrick Rudolph <patrick.rudolph@9elements.com>2019-01-02 14:04:02 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-01-24 13:54:21 +0000
commitab0a77453c86fe01ef142fcf1df5e1c11a16daf2 (patch)
tree14a701f834cf7e13da6444a50efae7dae5aefa63 /src/soc/cavium
parent267684f10e5b86bfa5ee8af25d8f61b2a5a27e5e (diff)
downloadcoreboot-ab0a77453c86fe01ef142fcf1df5e1c11a16daf2.tar.xz
cbmem_top: Fix comment and remove upper limit
There's no such limit on 64 Bit coreboot builds. * Fix comment in cbmem.h * Remove 4 GiB limit on Cavium SoCs Tested on opencellular/elgon. Still boots Linux as payload. Change-Id: I8c9c6a5ff81bee48311e8bf8e383d1a032ea3a6d Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/30609 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/cavium')
-rw-r--r--src/soc/cavium/cn81xx/cbmem.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/cavium/cn81xx/cbmem.c b/src/soc/cavium/cn81xx/cbmem.c
index 397fd263d7..bb6fa18f20 100644
--- a/src/soc/cavium/cn81xx/cbmem.c
+++ b/src/soc/cavium/cn81xx/cbmem.c
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright 2014 Rockchip Inc.
+ * Copyright 2019 9Elements GmbH <patrick.rudolph@9elements.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -22,6 +23,5 @@
void *cbmem_top(void)
{
/* Make sure not to overlap with reserved ATF scratchpad */
- return (void *)min((uintptr_t)_dram + (sdram_size_mb() - 1) * MiB,
- 4ULL * GiB);
+ return (void *)((uintptr_t)_dram + (sdram_size_mb() - 1) * MiB);
}