diff options
author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2019-01-02 13:52:51 +0100 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2019-02-22 12:25:25 +0000 |
commit | 71c0a9498702afb3a94cf36a6eec7aec8f9890b2 (patch) | |
tree | 2601987bf072d0f259766ce980f0266957968c1c /src/soc/cavium | |
parent | ab770083952dbe39987650a9570967b1436ce785 (diff) | |
download | coreboot-71c0a9498702afb3a94cf36a6eec7aec8f9890b2.tar.xz |
drivers/cavium: Add UART PCI driver
Add UART PCI driver in cavium/common/pci.
Tested on opencellular/elgon.
The UART is still initialized and usable in Linux.
Change-Id: I0fa2f086aba9b4f9c6dba7a35a84ea61c5fa64e4
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/30608
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/cavium')
-rw-r--r-- | src/soc/cavium/cn81xx/soc.c | 12 | ||||
-rw-r--r-- | src/soc/cavium/common/Makefile.inc | 2 | ||||
-rw-r--r-- | src/soc/cavium/common/pci/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/cavium/common/pci/uart.c | 40 |
4 files changed, 43 insertions, 12 deletions
diff --git a/src/soc/cavium/cn81xx/soc.c b/src/soc/cavium/cn81xx/soc.c index 4b265d7d7b..2358d71c57 100644 --- a/src/soc/cavium/cn81xx/soc.c +++ b/src/soc/cavium/cn81xx/soc.c @@ -381,18 +381,6 @@ static void soc_init(struct device *dev) } } - /* Init UARTs */ - size_t i; - struct device *uart_dev; - for (i = 0; i <= 3; i++) { - uart_dev = dev_find_slot(1, PCI_DEVFN(8, i)); - /* using device enable state from devicetree.cb */ - if (uart_dev && uart_dev->enabled) { - if (!uart_is_enabled(i)) - uart_setup(i, 0); - } - } - if (IS_ENABLED(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE)) soc_init_atf(); } diff --git a/src/soc/cavium/common/Makefile.inc b/src/soc/cavium/common/Makefile.inc index ada8286591..ecde220667 100644 --- a/src/soc/cavium/common/Makefile.inc +++ b/src/soc/cavium/common/Makefile.inc @@ -15,6 +15,8 @@ ifeq ($(CONFIG_SOC_CAVIUM_COMMON),y) +subdirs-y += pci + CFLAGS_arm64 += -Wstack-usage=$(CONFIG_STACK_SIZE) bootblock-$(CONFIG_BOOTBLOCK_CUSTOM) += bootblock.c diff --git a/src/soc/cavium/common/pci/Makefile.inc b/src/soc/cavium/common/pci/Makefile.inc new file mode 100644 index 0000000000..13040527d0 --- /dev/null +++ b/src/soc/cavium/common/pci/Makefile.inc @@ -0,0 +1 @@ +ramstage-y += uart.c diff --git a/src/soc/cavium/common/pci/uart.c b/src/soc/cavium/common/pci/uart.c new file mode 100644 index 0000000000..6e41e1d3d6 --- /dev/null +++ b/src/soc/cavium/common/pci/uart.c @@ -0,0 +1,40 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 9Elements GmbH <patrick.rudolph@9elements.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <device/device.h> +#include <soc/uart.h> +#include <device/pci.h> +#include <device/pci_ids.h> + +static void cavium_uart_init(struct device *dev) +{ + const u8 fn = PCI_FUNC(dev->path.pci.devfn); + + /* Calling uart_setup with no baudrate will do minimal HW init + * enough for the kernel to not panic */ + if (!uart_is_enabled(fn)) + uart_setup(fn, 0); +} + +static struct device_operations device_ops = { + .init = cavium_uart_init, +}; + +static const struct pci_driver soc_cavium_uart __pci_driver = { + .ops = &device_ops, + .vendor = PCI_VENDOR_CAVIUM, + .device = PCI_DEVICE_ID_CAVIUM_THUNDERX_UART, +}; |