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author | Vadim Bendebury <vbendeb@chromium.org> | 2014-08-29 16:34:46 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-21 16:57:17 +0100 |
commit | b2e465d060dafa070f140f92672cd1bf66d68f50 (patch) | |
tree | a3cbd57b8770356abe39a978c02ba837fbe60ae3 /src/soc/imgtec/danube/Makefile.inc | |
parent | c1081a4d02b09d6437dd5c6183f6dd1651a3b0eb (diff) | |
download | coreboot-b2e465d060dafa070f140f92672cd1bf66d68f50.tar.xz |
danube: prepare SOC directory for urara
These modules are necessary to resolve external names when building
the board image. These are just skeletons for now which will be filled
later.
BUG=chrome-os-partner:31438
TEST=when config is enabled, emerge-urara coreboot succeeds. more
extensive testing to come later
Change-Id: I0fcb5d33187172ecac77041425402b33e89e8944
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 94ec79b0ab872f5c5fe7db5bef5fdabf77d6b3b6
Original-Change-Id: I69cc178976a910ebf8031ed9ac9ad67b4cc0878a
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/215678
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8763
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/imgtec/danube/Makefile.inc')
-rw-r--r-- | src/soc/imgtec/danube/Makefile.inc | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/src/soc/imgtec/danube/Makefile.inc b/src/soc/imgtec/danube/Makefile.inc index 74822de82d..d7628ede51 100644 --- a/src/soc/imgtec/danube/Makefile.inc +++ b/src/soc/imgtec/danube/Makefile.inc @@ -19,14 +19,24 @@ # MA 02110-1301 USA # +# We enable CBFS_SPI_WRAPPER for Danuibe targets. +bootblock-y += spi.c +romstage-y += spi.c +ramstage-y += spi.c + ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c romstage-y += uart.c ramstage-y += uart.c endif -romstage-y += cbmem.c +bootblock-y += timestamp.c + ramstage-y += cbmem.c +ramstage-y += timestamp.c + +romstage-y += cbmem.c +romstage-y += timestamp.c # Generate the actual coreboot bootblock code $(objcbfs)/bootblock.raw: $(objcbfs)/bootblock.elf @@ -38,3 +48,4 @@ $(objcbfs)/bootblock.raw: $(objcbfs)/bootblock.elf $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw $(BIMGTOOL) @printf " BIMGTOOL $(subst $(obj)/,,$(@))\n" $(BIMGTOOL) $< $@ $(CONFIG_BOOTBLOCK_BASE) + |