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| author | Martin Roth <martin@coreboot.org> | 2019-10-23 21:45:23 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-10-27 21:08:58 +0000 |
| commit | 57e89090818537d6dd9bd478a3aa6b5ec2ea8704 (patch) | |
| tree | a218f5dba2bbd93ccc5fc3dc754499244e5378b7 /src/soc/imgtec/pistachio/uart.c | |
| parent | ad0f4853619b1c239b8ace7554958c6b4932c04f (diff) | |
| download | coreboot-57e89090818537d6dd9bd478a3aa6b5ec2ea8704.tar.xz | |
src/soc: change "unsigned" to "unsigned int"
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I9c1228d3f9e7a12fe30c48e3b1f143520fed875c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36332
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/soc/imgtec/pistachio/uart.c')
| -rw-r--r-- | src/soc/imgtec/pistachio/uart.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/soc/imgtec/pistachio/uart.c b/src/soc/imgtec/pistachio/uart.c index 1eb232aa13..d5042d546d 100644 --- a/src/soc/imgtec/pistachio/uart.c +++ b/src/soc/imgtec/pistachio/uart.c @@ -34,12 +34,12 @@ #define UART_SHIFT 2 #define GEN_ACCESSOR(name, idx) \ -static inline uint8_t read_##name(unsigned base_port) \ +static inline uint8_t read_##name(unsigned int base_port) \ { \ return read8((void *)(base_port + (idx << UART_SHIFT))); \ } \ \ -static inline void write_##name(unsigned base_port, uint8_t val) \ +static inline void write_##name(unsigned int base_port, uint8_t val) \ { \ write8((void *)(base_port + (idx << UART_SHIFT)), val); \ } @@ -54,12 +54,12 @@ GEN_ACCESSOR(lsr, UART8250_LSR) GEN_ACCESSOR(dll, UART8250_DLL) GEN_ACCESSOR(dlm, UART8250_DLM) -static int uart8250_mem_can_tx_byte(unsigned base_port) +static int uart8250_mem_can_tx_byte(unsigned int base_port) { return read_lsr(base_port) & UART8250_LSR_THRE; } -static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data) +static void uart8250_mem_tx_byte(unsigned int base_port, unsigned char data) { unsigned long int i = SINGLE_CHAR_TIMEOUT; while (i-- && !uart8250_mem_can_tx_byte(base_port)) @@ -67,19 +67,19 @@ static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data) write_tbr(base_port, data); } -static void uart8250_mem_tx_flush(unsigned base_port) +static void uart8250_mem_tx_flush(unsigned int base_port) { unsigned long int i = FIFO_TIMEOUT; while (i-- && !(read_lsr(base_port) & UART8250_LSR_TEMT)) udelay(1); } -static int uart8250_mem_can_rx_byte(unsigned base_port) +static int uart8250_mem_can_rx_byte(unsigned int base_port) { return read_lsr(base_port) & UART8250_LSR_DR; } -static unsigned char uart8250_mem_rx_byte(unsigned base_port) +static unsigned char uart8250_mem_rx_byte(unsigned int base_port) { unsigned long int i = SINGLE_CHAR_TIMEOUT; while (i-- && !uart8250_mem_can_rx_byte(base_port)) @@ -90,7 +90,7 @@ static unsigned char uart8250_mem_rx_byte(unsigned base_port) return 0x0; } -static void uart8250_mem_init(unsigned base_port, unsigned divisor) +static void uart8250_mem_init(unsigned int base_port, unsigned int divisor) { /* Disable interrupts */ write_ier(base_port, 0x0); |