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authorStefan Reinauer <stefan.reinauer@coreboot.org>2015-12-14 17:31:44 -0800
committerMartin Roth <martinroth@google.com>2015-12-17 21:13:35 +0100
commit3bdd45e714ebfa38e352c705b8bb7374827bc1e3 (patch)
tree9f14f9d7e0067be4e98e1ba5c6818f0bbd021c5e /src/soc/imgtec/pistachio
parent74babffccbd9ff47369650bcb5bd6e016d757959 (diff)
downloadcoreboot-3bdd45e714ebfa38e352c705b8bb7374827bc1e3.tar.xz
soc/imgtec/pistachio: Implement hard_reset()
Verified boot needs hard_reset() now, so offer a dummy implementation for the Imagination chip. Sorry, I don't have the specs for this chip anymore to make a real implementation, but I would like to keep this code from bit rotting. Change-Id: I15aa47f7d248b99901a2ac0e65a46b43d7718717 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/12723 Tested-by: build bot (Jenkins) Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Diffstat (limited to 'src/soc/imgtec/pistachio')
-rw-r--r--src/soc/imgtec/pistachio/Kconfig1
-rw-r--r--src/soc/imgtec/pistachio/Makefile.inc1
-rw-r--r--src/soc/imgtec/pistachio/reset.c25
3 files changed, 27 insertions, 0 deletions
diff --git a/src/soc/imgtec/pistachio/Kconfig b/src/soc/imgtec/pistachio/Kconfig
index e26130b8a7..2e28174329 100644
--- a/src/soc/imgtec/pistachio/Kconfig
+++ b/src/soc/imgtec/pistachio/Kconfig
@@ -21,6 +21,7 @@ config CPU_IMGTEC_PISTACHIO
select HAVE_UART_SPECIAL
select SPI_ATOMIC_SEQUENCING
select GENERIC_GPIO_LIB
+ select HAVE_HARD_RESET
bool
if CPU_IMGTEC_PISTACHIO
diff --git a/src/soc/imgtec/pistachio/Makefile.inc b/src/soc/imgtec/pistachio/Makefile.inc
index 1a5e2af600..78e77892fc 100644
--- a/src/soc/imgtec/pistachio/Makefile.inc
+++ b/src/soc/imgtec/pistachio/Makefile.inc
@@ -33,6 +33,7 @@ bootblock-y += monotonic_timer.c
ramstage-y += cbmem.c
ramstage-y += monotonic_timer.c
ramstage-y += soc.c
+ramstage-y += reset.c
romstage-y += cbmem.c
romstage-y += ddr2_init.c
diff --git a/src/soc/imgtec/pistachio/reset.c b/src/soc/imgtec/pistachio/reset.c
new file mode 100644
index 0000000000..7bf4d03306
--- /dev/null
+++ b/src/soc/imgtec/pistachio/reset.c
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <reset.h>
+
+void hard_reset(void)
+{
+ printk(BIOS_EMERG, "reset failed!\n");
+ /* TBD */
+ for (;;)
+ ;
+}