summaryrefslogtreecommitdiff
path: root/src/soc/imgtec
diff options
context:
space:
mode:
authorVadim Bendebury <vbendeb@chromium.org>2014-11-04 16:12:05 -0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-04-02 21:52:35 +0200
commit5c9f5342699a85b5c06f74924d730733591a64bd (patch)
tree4476426f65ffd269c291a70c0e117dfddd740cf5 /src/soc/imgtec
parent33c10f8c32a16701ad601d491322fb2468111b9b (diff)
downloadcoreboot-5c9f5342699a85b5c06f74924d730733591a64bd.tar.xz
urara: Fix CBFS header definitions
Urara CBFS header configuration is broken. CBFS header needs to be right above the bootblock, and the CBFS data - 0x100 bytes above, to allow room for proper CBFS wrapper structures. Ideally only the header offset should be specified (and even that could be derived from the bootblock size). But this is a more generic problem to be addressed with different architectures' image layout requirements in mind. BRANCH=none BUG=chrome-os-partner:31438 TEST=coreboot image passes the integrity check now (it was failing before because CBGS header was overlaying the bootblock) $ FEATURES=noclean emerge-urara coreboot $ /build/urara/tmp/portage/sys-boot/coreboot-9999/work/coreboot-9999/build/util/bimgtool/bimgtool \ /build/urara/firmware/coreboot.rom.serial $ cbfstool /build/urara/firmware/coreboot.rom.serial print coreboot.rom.serial: 1024 kB, bootblocksize 9956, romsize 1048576, offset 0x4100 alignment: 64 bytes, architecture: mips Name Offset Type Size fallback/romstage 0x4100 stage 7100 fallback/ramstage 0x5d00 stage 18995 config 0xa780 raw 2452 (empty) 0xb140 null 1003096 Change-Id: Id615bdcc6261dea9f36a409bd90f1e4764353bb9 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 8a0115963aa7460e4c7255ab8508d7d52d67fb67 Original-Change-Id: Id200ab5421661ef39b7c7713e931c39153fdc8be Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/227523 Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/9187 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/soc/imgtec')
-rw-r--r--src/soc/imgtec/pistachio/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/imgtec/pistachio/Kconfig b/src/soc/imgtec/pistachio/Kconfig
index 83408bd8a1..2e8b700007 100644
--- a/src/soc/imgtec/pistachio/Kconfig
+++ b/src/soc/imgtec/pistachio/Kconfig
@@ -40,6 +40,10 @@ config BOOTBLOCK_BASE
default 0x9b000000
config CBFS_ROM_OFFSET
+ hex
+ default 0x4100
+
+config CBFS_HEADER_ROM_OFFSET
# Effectively the maximum size of the bootblock
hex
default 0x4000